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TSB41BA3APFP Fiches technique(PDF) 3 Page - Texas Instruments

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No de pièce TSB41BA3APFP
Description  IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
Download  66 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TSB41BA3APFP Fiches technique(HTML) 3 Page - Texas Instruments

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TSB41BA3A
IEEE 1394b THREEPORT CABLE TRANSCEIVER/ARBITER
SLLS618B − JUNE 2004 − REVISED AUGUST 2004
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
The PHY-link interface can follow either the IEEE 1394a-2000 protocol or the IEEE 1394b-2002 protocol. When
using a 1394a-2000 LLC such as the TSB12LV26, the BMODE terminal must be deasserted. The PHY-link
interface then operates in accordance with the legacy 1394a-2000 standard. When using a 1394b LLC such
as the TSB82AA2, the BMODE terminal must be asserted. The PHY-link interface then conforms to the
1394b-2002 standard.
The cable interface can follow either the IEEE 1394a-2000 protocol or the 1394b protocol on all ports. The mode
of operation is determined by the interface capabilities of the ports being connected. When any of the three ports
is connected to a 1394a-2000 compliant device, the cable interface on that port operates in the 1394a-2000
data-strobe mode at a compatible S100, S200, or S400 speed. When a bilingual port is connected to a 1394b
compliant node, the cable interface on that port operates per the 1394b-2002 standard at S100B, S200B, or
S400B speed. The TSB41BA3A automatically determines the correct cable interface connection method for the
bilingual ports.
NOTE:
The BMODE terminal does not select the cable interface mode of operation. The BMODE terminal
selects the PHY-link interface mode of operation and affects the arbitration modes on the cable.
When the BMODE terminal is deasserted, the PHY-link interface is placed in 1394a-2000 mode and
BOSS arbitration is disabled. When the BMODE terminal is asserted, the PHY-link interface is
placed in 1394b-2002 mode and BOSS arbitration is enabled.
During packet reception the serial data bits are split into 2-, 4-, or 8-bit parallel streams (depending upon the
indicated receive speed and the PHY-link interface mode of operation), resynchronized to the local system clock
and sent to the associated LLC. The received data is also transmitted (repeated) on the other connected and
active cable ports.
Both the twisted pair A (TPA) and the twisted pair B (TPB) cable interfaces incorporate differential comparators
to monitor the line states during initialization and arbitration when connected to a 1394a-2000 compliant device.
The outputs of these comparators are used by the internal logic to determine the arbitration status. The TPA
channel monitors the incoming cable common-mode voltage. The value of this common-mode voltage is used
during 1394a-mode arbitration and sets the speed of the next packet transmission. In addition, the TPB channel
monitors the incoming cable common-mode voltage on the TPB pair for the presence of the remotely supplied
twisted pair bias (TPBIAS) voltage.
When connected to a 1394a-2000 compliant node, the TSB41BA3A provides a 1.86-V nominal bias voltage at
the TPBIAS terminal for port termination. The PHY contains three independent TPBIAS circuits (one for each
port). This bias voltage, when seen through a cable by a remote receiver, indicates the presence of an active
connection. This bias voltage source must be stabilized by an external filter capacitor of 1
µF.
The line drivers in the TSB41BA3A, are designed to work with external 112-
Ω termination resistor networks in
order to match the 110-
Ω cable impedance. One termination network is required at each end of a twisted-pair
cable. Each network is composed of a pair of series-connected ~56-
Ω resistors. The midpoint of the pair of
resistors that are connected to the TPA terminals is connected to its corresponding TPBIAS voltage terminal.
The midpoint of the pair of resistors that are directly connected to the TPB terminals is coupled to ground through
a parallel RC network with recommended values of 5 k
Ω and 270 pF. The values of the external line-termination
resistors are designed to meet the standard specifications when connected in parallel with the internal receiver
circuits. A precision external resistor connected between the R0 and R1 terminals sets the driver output current,
along with other internal operating currents.
When the power supply of the TSB41BA3A is off while the twisted-pair cables are connected, the TSB41BA3A
transmitter and receiver circuitry present a high-impedance signal to the cable that does not load the device at
the other end of the cable.


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