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AD7914 Fiches technique(PDF) 6 Page - Analog Devices

No de pièce AD7914
Description  4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP
Download  24 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

AD7914 Fiches technique(HTML) 6 Page - Analog Devices

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–6–
REV. 0
(AVDD = VDRIVE = 2.7 V to 5.25 V, REFIN = 2.5 V, fSCLK = 20 MHz, TA = TMIN to TMAX,
unless otherwise noted.)
AD7924–SPECIFICATIONS
Parameter
B Version
1
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
fIN = 50 kHz Sine Wave, fSCLK = 20 MHz
Signal to Noise + Distortion (SINAD)
2
70
dB min
@ 5 V
69
dB min
@ 3 V Typically 69.5 dB
Signal to Noise Ratio (SNR)
2
70
dB min
Total Harmonic Distortion (THD)
2
–77
dB max
@ 5 V Typically –84 dB
–73
dB max
@ 3 V Typically –77 dB
Peak Harmonic or Spurious Noise
–78
dB max
@ 5 V Typically –86 dB
(SFDR)
2
–76
dB max
@ 3 V Typically –80 dB
Intermodulation Distortion (IMD)
2
fa = 40.1 kHz, fb = 41.5 kHz
Second Order Terms
–90
dB typ
Third Order Terms
–90
dB typ
Aperture Delay
10
ns typ
Aperture Jitter
50
ps typ
Channel-to-Channel Isolation
2
–85
dB typ
fIN = 400 kHz
Full Power Bandwidth
8.2
MHz typ
@ 3 dB
1.6
MHz typ
@ 0.1 dB
DC ACCURACY
2
Resolution
12
Bits
Integral Nonlinearity
±1
LSB max
Differential Nonlinearity
–0.9/+1.5
LSB max
Guaranteed No Missed Codes to 12 Bits
0 V to REFIN Input Range
Straight Binary Output Coding
Offset Error
±8
LSB max
Typically
±0.5 LSB
Offset Error Match
±0.5
LSB max
Gain Error
±1.5
LSB max
Gain Error Match
±0.5
LSB max
0 V to 2
× REF
IN Input Range
–REFIN to +REFIN Biased about REFIN with
Positive Gain Error
±1.5
LSB max
Twos Complement Output Coding
Positive Gain Error Match
±0.5
LSB max
Zero Code Error
±8
LSB max
Typically
±0.8 LSB
Zero Code Error Match
±0.5
LSB max
Negative Gain Error
±1
LSB max
Negative Gain Error Match
±0.5
LSB max
ANALOG INPUT
Input Voltage Range
0 to REFIN
V
RANGE Bit Set to 1
0 to 2
× REFIN V
RANGE Bit Set to 0, VDD/VDRIVE = 4.75 V to 5.25 V
DC Leakage Current
±1
µA max
Input Capacitance
20
pF typ
REFERENCE INPUT
REFIN Input Voltage
2.5
V
±1% Specified Performance
DC Leakage Current
±1
µA max
REFIN Input Impedance
36
k
Ω typ
fSAMPLE = 1 MSPS
LOGIC INPUTS
Input High Voltage, VINH
0.7
× V
DRIVE
V min
Input Low Voltage, VINL
0.3
× VDRIVE
V max
Input Current, IIN
±1
µA max
Typically 10 nA, VIN = 0 V or VDRIVE
Input Capacitance, CIN
3
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
VDRIVE – 0.2
V min
ISOURCE = 200
µA, VDD = 2.7 V to 5.25 V
Output Low Voltage, VOL
0.4
V max
ISINK = 200
µA
Floating-State Leakage Current
±1
µA max
Floating-State Output Capacitance
3
10
pF max
Output Coding
Straight (Natural) Binary
Coding Bit Set to 1
Twos Complement
Coding Bit Set to 0


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