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TC74LCX74FN Fiches technique(PDF) 1 Page - Toshiba Semiconductor |
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TC74LCX74FN Fiches technique(HTML) 1 Page - Toshiba Semiconductor |
1 / 9 page TC74LCX74F/FN/FT 2002-01-11 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LCX74F,TC74LCX74FN,TC74LCX74FT Low-Voltage Dual D-Type Flip-Flop with 5-V Tolerant Inputs and Outputs The TC74LCX74F/FN/FT is a high-performance CMOS D-type flip-flop. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5-V supply environment for inputs. The signal level applied to the D input is transferred to Q output during the positive going transition of the CK pulse. CLR and PR are independent of the CK and are accomplished by setting the appropriate input low. All inputs are equipped with protection circuits against static discharge. Features · Low-voltage operation: VCC = 2.0 to 3.6 V · High-speed operation: tpd = 7.0 ns (max) (VCC = 3.0 to 3.6 V) · Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V) · Latch-up performance: ±500 mA · Available in JEDEC SOP, JEITA SOP and TSSOP · Power-down protection provided on all inputs and outputs · Pin and function compatible with the 74 series (74AC/VHC/HC/F/ALS/LS etc.) 74 type Note: xxxFN (JEDEC SOP) is not available in Japan. TC74LCX74F TC74LCX74FN TC74LCX74FT Weight SOP14-P-300-1.27: 0.18 g (typ.) SOL14-P-150-1.27: 0.12 g (typ.) TSSOP14-P-0044-0.65: 0.06 g (typ.) |
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