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CS2082 Fiches technique(PDF) 8 Page - ON Semiconductor |
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CS2082 Fiches technique(HTML) 8 Page - ON Semiconductor |
8 / 12 page CS2082 http://onsemi.com 8 squib resistance) may be reported by the fault register and should be ignored. Power Dissipation during resistive measurement can be calculated as: P + ISQUIB(VBAT * VDIFF) * (ISQUIB RMR) where VBAT is the voltage at the CS2082 VBAT pin and ISQUIB is the measurement current through the squib. A typical value for P is 300 mW when VBAT = 13.5, VDIFF = 50 mV, RSQUIB = 2.0 Ω and RMR = 49.9 Ω. The resultant increase in power dissipation will cause a corresponding increase in die temperature which will cause a corresponding decrease in time to thermal shutdown of the CS2082. To minimize the impact of squib resistive measurements on time to thermal shutdown a 5% duty cycle is recommended. Analog MUX – $4d The $4d command selects one of five states at the AOUT pin. The states are: High–Z; MR voltage; AIN voltage; proportion of VBAT; proportion of VRES. The active–high Analog Mux select register bit definitions are shown in Table 6. All other states will be interpreted as High–Z. At power–up, the default state is ‘High–Z.’ Table 6. Analog MUX Output Select D3 D2 D1 D0 State 0 0 0 0 High–Z 0 0 0 1 MR 0 0 1 0 AIN 0 1 0 0 BAT 1 0 0 0 RES Low Side Switch Control – $5d The $5d command activates the low side switches. When a data bit is low that switch is turned on. More than one switch can be activated at a time. Bit assignment is shown in Table 7. At power–up, no switches are active. Table 7. Low Side Switch Select D3 D2 D1 D0 Active x x 0 0 BOTH x x 0 1 SL2 x x 1 0 SL1 x x 1 1 NONE Auxiliary Control Register – $6d The $6d command selects the VRES Monitoring trip threshold. The threshold determines when the $1x Status Register reports VRES = 1. Bit assignment is shown in Table 8. At power–up, default trip is 17 V. Table 8. VRES Monitor Trip Select D3 D2 D1 D0 Trip x x x 0 17 V x x x 1 23 V High Side Switch Control – $Ad The $Ad command activates the high side switches. When a data bit is high, that switch is turned on. More than one switch can be activated at a time. Bit assignment is shown in Table 9. Note that the $5d and $Ad commands are binary complements, i.e., by sending 1010xx11, both high side switches are activated, and by sending the complement 0101xx00, both low side switches are activated. At power–up, no switches are active. Table 9. High Side Switch Select D3 D2 D1 D0 Active x x 0 0 NONE x x 0 1 SH1 x x 1 0 SH2 x x 1 1 BOTH |
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