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TPS7A53-Q1 Fiches technique(PDF) 4 Page - Texas Instruments |
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TPS7A53-Q1 Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 28 page 4 TPS7A53-Q1 SBVS298 – SEPTEMBER 2017 www.ti.com Product Folder Links: TPS7A53-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The absolute maximum rating is VIN + 0.3 V or 7.0 V, whichever is smaller. 6 Specifications 6.1 Absolute Maximum Ratings over junction temperature range (unless otherwise noted) (1) MIN MAX UNIT Voltage IN, BIAS, PG, EN –0.3 7.0 V OUT –0.3 VIN + 0.3 (2) V NR/SS, FB –0.3 3.6 V Current OUT Internally limited A PG (sink current into device) 5 mA Temperature Operating junction, TJ –55 150 °C Storage, Tstg –55 150 °C (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V Charged-device model (CDM), per AEC Q100-011 ±500 (1) Bias supply voltage is required when the VIN supply is below 1.4 V. Conversely, no bias supply is required when the VIN supply is higher than or equal to 1.4 V. A bias supply helps improve dc and ac performance for VIN ≤ 2.2 V. (2) The recommended output capacitors are selected to optimize PSRR for the frequency range of 400 kHz to 700 kHz. This frequency range is a typical value for dc-dc supplies. (3) If BIAS is used, a 10-µF capacitor is required. If BIAS is not used, a capacitor on the BIAS pin is not needed. (4) The 12.1-kΩ resistor is selected to optimize PSRR and noise by matching the internal R1 value. (5) The upper limit for the R2 resistor is to provide accuracy by making the current through the feedback network much larger than the leakage current into the feedback node. 6.3 Recommended Operating Conditions over junction temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN Input supply voltage range(1) 1.1 6.5 V VBIAS Bias supply voltage range(1) 3.0 6.5 V VEN Enable voltage range 0 6.5 V IOUT Output current 0 3 A CIN Input capacitor 10 47 µF COUT Output capacitor(2) 47 47 || 10 || 10 µF CBIAS Bias capacitor(3) 10 µF RPG Power-good pullup resistance 10 100 kΩ CNR/SS NR/SS capacitor 10 nF CFF Feed-forward capacitor 10 nF R1 Top resistor value in feedback network for adjustable operation(4) 12.1 kΩ R2 Bottom resistor value in feedback network for adjustable operation(5) 160 kΩ TJ Operating junction temperature –40 140 °C |
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