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ZXLD1601 Fiches technique(PDF) 3 Page - Zetex Semiconductors |
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ZXLD1601 Fiches technique(HTML) 3 Page - Zetex Semiconductors |
3 / 12 page ZXLD1601 SEMICO NDUC TORS ISSUE 3 - AUGUST 2004 3 Symbol Parameter Conditions Min Typ Max Units T/T PWM duty cycle range at ‘EN’ input for dc output voltage control 10kHz<f< 100kHz, VENH =VIN 20 100 % fLPF Internal PWM low pass filter cut-off frequency 4 kHz ALPF Filter attenuation f=30kHz 52.5 dB T/T (4) PWM duty cycle range at ‘EN’ input for ‘gated’ output voltage control f < 1kHz, VENH =VIN 0 100 % ELECTRICAL CHARACTERISTICS (Cont.): (Test conditions: VIN=VEN=3V, TAMB=25°C unless otherwise stated (1) ) NOTES: 4 The maximum PWM signal frequency during this mode of operation should be kept as low as possible to minimize errors due to the turn-off delay |
Numéro de pièce similaire - ZXLD1601 |
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