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74LVC2G240DP Fiches technique(PDF) 5 Page - NXP Semiconductors |
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74LVC2G240DP Fiches technique(HTML) 5 Page - NXP Semiconductors |
5 / 20 page 2003 Mar 11 5 Philips Semiconductors Product specification Dual buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state 74LVC2G240 RECOMMENDED OPERATING CONDITIONS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. 3. Above 110 °C the value of PD derates linearly with 8 mW/K. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage VCC = 1.65 to 5.5 V; enable mode 0 VCC V VCC = 1.65 to 5.5 V; disable mode 0 5.5 V VCC = 0 V; Power-down mode 0 5.5 V Tamb operating ambient temperature −40 +125 °C tr, tf input rise and fall times VCC = 1.65 to 2.7 V 0 20 ns/V VCC = 2.7 to 5.5 V 0 10 ns/V SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +6.5 V IIK input diode current VI <0 −−50 mA VI input voltage note 1 −0.5 +6.5 V IOK output diode current VO >VCC or VO <0 −±50 mA VO output voltage enable mode; notes 1 and 2 −0.5 VCC + 0.5 V disable mode; notes 1 and 2 −0.5 +6.5 V Power-down mode; notes 1 and 2 −0.5 +6.5 V IO output source or sink current VO =0toVCC −±50 mA ICC, IGND VCC or GND current −±100 mA Tstg storage temperature −65 +150 °C PD power dissipation Tamb = −40 to +125 °C; note 3 − 300 mW |
Numéro de pièce similaire - 74LVC2G240DP |
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Description similaire - 74LVC2G240DP |
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