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74LVC2G86 Fiches technique(PDF) 8 Page - NXP Semiconductors |
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74LVC2G86 Fiches technique(HTML) 8 Page - NXP Semiconductors |
8 / 15 page 9397 750 14506 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 03 — 7 February 2005 8 of 15 Philips Semiconductors 74LVC2G86 Dual 2-input exclusive-OR gate [1] All typical values are measured at Tamb =25 °C. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of switching inputs; ∑(C L × VCC 2 × f o) = sum of outputs. [3] The condition is VI = GND to VCC. 13. Waveforms Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay inputs nA, nB to outputs nY see Figure 6 VCC = 1.65 V to 1.95 V 1.4 3.8 12.4 ns VCC = 2.3 V to 2.7 V 0.8 2.5 7.2 ns VCC = 2.7 V 0.8 3.0 7.2 ns VCC = 3.0 V to 3.6 V 0.8 2.3 5.9 ns VCC = 4.5 V to 5.5 V 0.6 1.9 4.5 ns Table 9: Dynamic characteristics …continued GND = 0 V; for test circuit see Figure 7. Symbol Parameter Conditions Min Typ Max Unit Measurement points are given in Table 10. VOL and VOH are typical output voltage drop that occur with the output load. Fig 6. Propagation delay input (nA, nB) to output (nY) Table 10: Measurement points Supply voltage Input Output VCC VM VM 1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC 2.3 V to 2.7 V 0.5 × V CC 0.5 × V CC 2.7 V 1.5 V 1.5 V 3.0 V to 3.6 V 1.5 V 1.5 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × V CC mna224 nA, nB input nY output tPLH tPHL GND VI VM VM VOH VOL |
Numéro de pièce similaire - 74LVC2G86 |
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Description similaire - 74LVC2G86 |
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