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TPSM846C23 Fiches technique(PDF) 4 Page - Texas Instruments |
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TPSM846C23 Fiches technique(HTML) 4 Page - Texas Instruments |
4 / 82 page 4 TPSM846C23 SLVSDF3C – MARCH 2017 – REVISED AUGUST 2017 www.ti.com Product Folder Links: TPSM846C23 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION NAME NO. DNC 8, 21, 30, 31 – Do Not Connect. Do not connect these pins to AGND, PGND, to another DNC pin, or to any other voltage. These pins are connected to internal circuitry. Each pin must be soldered to an isolated pad. FB 7 I Feedback pin for the control loop. ISHARE 2 I Current sharing signal for parallel operation. NC 1, 15 – Not Connected. These pins are internally isolated from any signal and all other pins. Each pin must be soldered to a pad on the PCB. These pins can be left isolated, or connected to AGND or PGND. PGND 32, 33, 34, 35, 36, 42, 43, 54, 56, 57, 58, 59 G Power ground of the device. This is the return current path for the power stage of the device. Connect these pins to the bypass capacitors associated with VIN and VOUT. Pads 56, 57, 58, and 59 should be connected to the PCB ground planes using multiple vias for optimal thermal performance. All pins should be connected together externally with a copper plane or pour directly under the device. PGOOD 52 O Power good indicator. This pin is an open-drain output and will assert low during any fault/warn conditions. See PMBus Power Good section for details. Requires a pull-up resistor. PH 22, 23, 24, 25, 26, 27, 28, 29 O Phase switch node. Do not connect any external components to these pins or tie them to a pin of another function. VIN 44, 45, 46, 53 I Input switching voltage pins. These pins supply voltage to the power switches of the converter. RT 13 I Frequency-setting resistor. To operate the device at its default switching frequency, make no connection to this pin. To operate at a different switching frequency, connect a resistor from this pin to AGND. RT_SEL 14 I RT resistor select. To operate the device at its default switching frequency, connect this pin to AGND. To operate at a different switching frequency, let this pin float. SYNC 11 I/O Frequency synchronization pin. In a stand-alone application or as the Master device in a parallel configuration, the SYNC pin is configured as a SYNC-IN pin and power conversion is synchronized to the rising edge of a 50% duty cycle external clock applied to this pin. For a Slave device in a parallel configuration, power conversion is synchronized to the falling edge of the incoming clock. VINBP 50 I Input power to the controller circuitry. Bypass this pin with a minimum of 1-µF to BP_RTN. This pin is internally connected to VIN. BP_RTN 51 G Return path for VINBP and BP3. This pin is internally connected to PGND, pad 59. VOUT 37, 38, 39, 40, 41, 55 O Output voltage. These pins are connected to the internal output inductor. Connect these pins to the output load and connect external bypass capacitors between these pins and PGND. VSHARE 3 I/O Voltage sharing signal for parallel operation. VS+ 4 I Positive input of the remote amplifier. Connect this pin to VOUT at the load for best voltage regulation. Do not let this pin float. VS– 5 I Negative input of the remote amplifier. Connect this pin to ground at the load for best voltage regulation. Do not let this pin float. BP3 47 O Output of the internal 3.3-V regulator. Bypass this pin with a minimum of 2.2-µF to BP_RTN. Can be used as a pull-up termination voltage for PGOOD and PMBus signals. BP6 49 O Output of the internal 6.5V regulator that powers the driver stage of the device. Bypass this pin with a minimum of 2.2-µF to BP6_RTN. BP6_RTN 48 G Power ground return path for BP6 bypass cap. |
Numéro de pièce similaire - TPSM846C23_17 |
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Description similaire - TPSM846C23_17 |
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