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GS74116AGP-12I Fiches technique(PDF) 6 Page - GSI Technology |
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GS74116AGP-12I Fiches technique(HTML) 6 Page - GSI Technology |
6 / 14 page GS74116AGP/X Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.10 1/2013 6/13 © 2001, GSI Technology AC Characteristics Read Cycle Parameter Symbol -8 -10 -12 Unit Min Max Min Max Min Max Read cycle time tRC 8 — 10 — 12 — ns Address access time tAA — 8 — 10 — 12 ns Chip enable access time (CE) tAC — 8 — 10 — 12 ns Byte enable access time (UB, LB) tAB — 3.5 — 4 — 5 ns Output enable to output valid (OE) tOE — 3.5 — 4 — 5 ns Output hold from address change tOH 3 — 3 — 3 — ns Chip enable to output in low Z (CE) t * 3 — 3 — 3 — ns Output enable to output in low Z (OE) t * 0 — 0 — 0 — ns Byte enable to output in low Z (UB, LB) t * 0 — 0 — 0 — ns Chip disable to output in High Z (CE) t * — 4 — 5 — 6 ns Output disable to output in High Z (OE) t * — 3.5 — 4 — 5 ns Byte disable to output in High Z (UB, LB) t * — 3.5 — 4 — 5 ns * These parameters are sampled and are not 100% tested. tAA tOH tRC Address Data Out Previous Data Data valid Read Cycle 1: CE = OE = VIL, WE = VIH, UB and, or LB = VIL LZ OLZ BLZ HZ OHZ BHZ |
Numéro de pièce similaire - GS74116AGP-12I |
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Description similaire - GS74116AGP-12I |
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