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DAC7528U Fiches technique(PDF) 6 Page - Burr-Brown (TI) |
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DAC7528U Fiches technique(HTML) 6 Page - Burr-Brown (TI) |
6 / 8 page ® DAC7528 6 POWER SUPPLY CONNECTIONS The DAC7528 is designed to operate on VDD = +5V +10%. For optimum performance and noise rejection, power supply decoupling capacitors CD should be added as shown in the application circuits. These capacitors (1 µF tantalum recom- mended) should be located close to the D/A. AGND and DGND should be connected together at one point only, pre- ferably at the power supply ground point. Separate returns minimize current flow in low-level signal paths if properly connected. Output op amp analog common (+ input) should be connected as near to the AGND pin of the DAC7528 as possible. WIRING PRECAUTIONS To minimize AC feedthrough when designing a PC board, care should be taken to minimize capacitive coupling be- tween the V REF lines and the IOUT lines. Similarly, capacitive coupling between DACs may compromise the channel-to- channel isolation. Coupling from any of the digital control or data lines might degrade the glitch and digital crosstalk performance. Solder the DAC7528 directly into the PC board without a socket. Sockets add parasitic capacitance (which can degrade AC performance). AMPLIFIER OFFSET VOLTAGE The output amplifier used with the DAC7528 should have low input offset voltage to preserve the transfer function linearity. The voltage output of the amplifier has an error component which is the offset voltage of the op amp multi- plied by the “noise gain” of the circuit. This “noise gain” is equal to (RF/RO + 1) where RO is the output impedance of the D/A I OUT terminal and RF is the feedback network impedance. The nonlinearity occurs due to the output im- pedance varying with code. If the 0 code case is excluded (where RO = infinity), the RO will vary from R to 3R providing a “noise gain” variation between 4/3 and 2. In addition, the variation of RO is nonlinear with code, and the largest steps in R O occur at major code transitions where the worst differential nonlinearity is also likely to be experi- enced. The nonlinearity seen at the amplifier output is 2VOS – 4VOS/3 = 2VOS/3. Thus, to maintain good nonlinearity the op amp offset should be much less than 1/2LSB. UNIPOLAR CONFIGURATION Figure 3 shows DAC7528 in a typical unipolar (two-quad- rant) multiplying configuration. The analog output values versus digital input code are listed in Table I. The opera- tional amplifiers used in this circuit can be single amplifiers such as the OPA602, or a dual amplifier such as the OPA2107. C1 and C2 provide phase compensation to minimize settling time and overshoot when using a high speed operational FIGURE 3. Unipolar Configuration 2 Quadrant Multiplica- tion. DAC A I OUT A DAC B I OUT B R FB B R FB A C1 10pF C2 10pF DAC7528 V OUT A V OUT B – + – + A1 A2 DGND V REF B V REF A V DD +5V C D A1, A2 OPA602 or 1/2 OPA2107. + 1µF AGND V OUT = – D IN 256 V REF amplifier. If an application requires the D/A to have zero gain error, the circuit shown in Figure 4 may be used. Resistors R2 and R4 induce a positive gain error greater than worst-case initial negative gain error. Trim resistors R1 and R3 provide a variable negative gain error and have sufficient trim range to correct for the worst-case initial positive gain error plus the error produced by R2 and R4. BIPOLAR CONFIGURATION Figure 5 shows the DAC7528 in a typical bipolar (four- quadrant) multiplying configuration. The analog output val- ues versus digital input code are listed in Table II. The operational amplifiers used in this circuit can be single amplifiers such as the OPA602, a dual amplifier such as the OPA2107, or a quad amplifier like the OPA404. C1 and C2 provide phase compensation to minimize settling time and overshoot when using a high speed operational amplifier. The bipolar offset resistors R1–R3 and R4–R6 should be ratio-matched to 0.195% to ensure the specified gain error performance. |
Numéro de pièce similaire - DAC7528U |
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Description similaire - DAC7528U |
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