 |
Moteur de recherche de fiches techniques de composants électroniques |
|
|
Moteur de recherche de fiches techniques de composants électroniques |
|
HT86A36 Fiches technique(PDF) 21 Page - Holtek Semiconductor Inc |
|
||||||||||||||||||||||||||||||
HT86A36 Fiches technique(HTML) 21 Page - Holtek Semiconductor Inc |
|
|
21 / 68 page  HT86Axx/HT86ARxx Rev. 1.10 21 December 12, 2012 Special Purpose Data Memory This area of Data Memory, is located in Bank 0, where registers, necessary for the correct operation of the microcontroller, are stored. Most of the registers are both readable and writeable but some are protected and are readable only, the details of which are located under the relevant Special Function Register section. Note that for locations that are unused, any read instruction to these addresses will return the value ²00H². Although the Special Purpose Data Memory registers are located in Bank 0, they will still be accessible even if the Bank Pointer has selected Bank 1. Special Function Registers To ensure successful operation of the microcontroller, certain internal registers are implemented in the RAM Data Memory area. These registers ensure correct op- eration of internal functions such as timers, interrupts, watchdog, etc., as well as external functions such as I/O data control. The location of these registers within the RAM Data Memory begins at the address ²00H². Any unused Data Memory locations between these special function registers and the point where the General Pur- pose Memory begins is reserved for future expansion purposes, attempting to read data from these locations will return a value of ²00H². Indirect Addressing Register - IAR0, IAR1 The Indirect Addressing Registers, IAR0 and IAR1, al- though having their locations in normal RAM register space, do not actually physically exist as normal regis- ters. The method of indirect addressing for RAM data manipulation uses these Indirect Addressing Registers and Memory Pointers, in contrast to direct memory ad- dressing, where the actual memory address is speci- fied. Actions on the IAR0 and IAR1 registers will result in no actual read or write operation to these registers but rather to the memory location specified by their corre- sponding Memory Pointer, MP0 or MP1. Acting as a pair, IAR0 and MP0 can together only access data from Bank 0, while the IAR1 and MP1 register pair can ac- cess data from both Bank 0 and Bank 1. As the Indirect Addressing Registers are not physically implemented, reading the Indirect Addressing Registers indirectly will return a result of ²00H² and writing to the registers indi- rectly will result in no operation. Memory Pointer - MP0, MP1 For all devices, two Memory Pointers, known as MP0 and MP1 are provided. These Memory Pointers are physically implemented in the Data Memory and can be manipulated in the same way as normal registers pro- viding a convenient way with which to address and track data. When any operation to the relevant Indirect Ad- dressing Registers is carried out, the actual address that the microcontroller is directed to, is the address speci- fied by the related Memory Pointer. MP0, together with Indirect Addressing Register, IAR0, are used to access data from Bank 0 only, while MP1 and IAR1 are used to access data from both Bank 0 and Bank 1. : U n k n o w I A R 0 M P 0 I A R 1 M P 1 B P A C C P C L T B L P T B L H W D T S S T A T U S I N T C T M R 0 T M R 0 C T M R 1 T M R 1 C P A P A C P B P B C P C P C C L A T C H 0 H L A T C H 0 M L A T C H 0 L L A T C H 1 H L A T C H 1 M L A T C H 1 L I N T C H T B H P T M R 2 T M R 2 C T M R 3 T M R 3 C V O I C E C D A L D A H V O L L A T C H D P D P D C A D R L A D R H A D C R A C S R L V D C P E P E C S B C R S B D R 0 0 H 0 1 H 0 2 H 0 3 H 0 4 H 0 5 H 0 6 H 0 7 H 0 8 H 0 9 H 0 A H 0 B H 0 C H 0 D H 0 E H 0 F H 1 0 H 1 1 H 1 2 H 1 3 H 1 4 H 1 5 H 1 6 H 1 7 H 1 8 H 1 9 H 1 A H 1 B H 1 C H 1 D H 1 E H 1 F H 2 0 H 2 1 H 2 2 H 2 3 H 2 4 H 2 5 H 2 6 H 2 7 H 2 8 H 2 9 H 2 A H 2 B H 2 C H 2 D H 2 E H 2 F H 3 0 H 3 1 H 3 2 H 3 3 H 3 4 H 3 5 H 3 6 H 3 7 H 3 8 H 3 9 H 3 A H 3 B H 3 C H 3 D H Special Purpose Data Memory Structure |
Numéro de pièce similaire - HT86A36_12 |
|
Description similaire - HT86A36_12 |
|
|
Lien URL |
| Politique de confidentialité |
| ALLDATASHEET.FR |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
French ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
