 |
Moteur de recherche de fiches techniques de composants électroniques |
|
|
Moteur de recherche de fiches techniques de composants électroniques |
|
HT82A525R Fiches technique(PDF) 42 Page - Holtek Semiconductor Inc |
|
||||||||||||||||||||||||||||||
HT82A525R Fiches technique(HTML) 42 Page - Holtek Semiconductor Inc |
|
|
42 / 71 page  The USR (USB endpoint interrupt status register) register is used to indicate which endpoint is accessed. The endpoint request flags (EP0IF, EP1IF, EP2IF and EP3IF) are used to indicate which endpoints are accessed. If an endpoint is accessed, the related endpoint request flag will be set to ²1², and then the USB interrupt takes place or not will depend on the ²Endpoint 0~3 interrupt function² via the configuration option. If the ²Endpoint 0~3 interrupt function² is configured as ²Disable², then the USB interrupt will occur (if the USB interrupt is enabled, the corresponding interrupt is enabled and the stack is not full). If the ²Endpoint 0~3 interrupt function² is configured as ²Enable², the USB interrupt will need to be managed by the Endpoint Interrupt control bits, EEP0I~EEP3I, in the USR register as well. The Endpoint Interrupt control bits are used to control which endpoint is accessed and generate interrupt. Only when the related Endpoint Interrupt control bits are selected as ²Enable², then the related USB interrupt will take place, otherwise, the USB interrupt will not occur. When the active endpoint request flag is served, the endpoint request flag has to be cleared to ²0². Bit No. Label R/W Function 0 EP0IF R/W The endpoint 0 interrupt request flag 0: inactive 1: active When this bit is set to ²1² (set by SIE), it indicates that the endpoint 0 is accessed and a USB interrupt will occur. When the interrupt has been served, this bit should be cleared by firmware. 1 EP1IF R/W The endpoint 1 interrupt request flag 0: inactive 1: active When this bit is set to ²1² (set by SIE), it indicates that the endpoint 1 is accessed and a USB interrupt will occur. When the interrupt has been served, this bit should be cleared by firmware. 2 EP2IF R/W The endpoint 2 interrupt request flag 0: inactive 1: active When this bit is set to ²1² (set by SIE), it indicates that the endpoint 2 is accessed and a USB interrupt will occur. When the interrupt has been served, this bit should be cleared by firmware. 3 EP3IF R/W The endpoint 3 interrupt request flag 0: inactive 1: active When this bit is set to ²1² (set by SIE), it indicates that the endpoint 3 is accessed and a USB interrupt will occur. When the interrupt has been served, this bit should be cleared by firmware. 4 EEP0I R/W The endpoint 0 interrupt enable 0: enable 1: disable 5 EEP1I R/W The endpoint 1 interrupt enable 0: enable 1: disable 6 EEP2I R/W The endpoint 2 interrupt enable 0: enable 1: disable 7 EEP3I R/W The endpoint 3 interrupt enable 0: enable 1: disable USR (21H) Definitions HT82A525R I/O Type USB 8-Bit OTP MCU with SPI Rev. 1.80 42 March 11, 2016 |
Numéro de pièce similaire - HT82A525R_16 |
|
Description similaire - HT82A525R_16 |
|
|
Lien URL |
| Politique de confidentialité |
| ALLDATASHEET.FR |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
French ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
