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HT48R063B Fiches technique(PDF) 26 Page - Holtek Semiconductor Inc |
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HT48R063B Fiches technique(HTML) 26 Page - Holtek Semiconductor Inc |
26 / 82 page HT48R063B/064B/065B/066B Rev. 1.20 26 June 3, 2013 ¨ HT48R066B Bit 76543210 Name ¾ PFDCS ¾¾ PFDEN1 PFDEN0 LXTLP CLKMOD R/W ¾ R/W ¾¾ R/W R/W R/W R/W POR ¾ 0 ¾¾ 0000 Bit 7, 5, 4 Unimplemented, read as ²0² Bit 6 PFDCS: PFD clock source 0: timer0 1: timer1 Bit 3,2 PFDEN1, PFDEN0: PFD/PFD enable/disable 00: both disables 01: Reserved 10: PFD enable 11: PFD and PFD both enabled when PFD or PFD is disabled, the related pin will have a normal I/O function. Bit 1 LXTLP: LXT oscillator low power control function 0: LXT Oscillator quick start-up mode 1: LXT Oscillator Low Power Mode Bit 0 CLKMOD: system clock mode selection. 0: High speed - HIRC used as system clock 1: Low speed - LXT used as system clock, HIRC oscillator stopped. For HT48R063B/064B/065B/066B, these selections are only valid if the oscillator configuration options have selected the HIRC+LXT. · CTRL1 Register Bit 76543210 Name INTEG1 INTEG0 TBSEL1 TBSEL0 WDTEN3 WDTEN2 WDTEN1 WDTEN0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 10001010 Bit 7, 6 INTEG1, INTEG0: External interrupt edge type 00: disable 01: rising edge trigger 10: falling edge trigger 11: dual edge trigger Bit 5, 4 TBSEL1, TBSEL0: Time base period selection 00: 2 10 ´ (1/fTP) 01: 2 11 ´ (1/fTP) 10: 2 12 ´ (1/fTP) 11: 2 13 ´ (1/fTP) Bit 3~0 WDTEN3, WDTEN2, WDTEN1, WDTEN0: WDT function enable 1010: WDT disabled Other values: WDT enabled - Recommended value is 0101 If the ²watchdog timer enable² is configuration option is selected, then the watchdog timer will always be enabled and the WDTEN3~WDTEN0 control bits will have no effect. Note: The WDT is only disabled when both the WDT configuration option is disabled and when bits WDTEN3~WDTEN0=1010. The WDT is enabled when either the WDT configuration option is enabled or when bits WDTEN3~WDTEN0 ¹1010. |
Numéro de pièce similaire - HT48R063B_13 |
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Description similaire - HT48R063B_13 |
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