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HT46R003B Fiches technique(PDF) 36 Page - Holtek Semiconductor Inc |
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HT46R003B Fiches technique(HTML) 36 Page - Holtek Semiconductor Inc |
36 / 76 page Rev. 1.00 36 ��ne 1�� �01� Rev. 1.00 37 ��ne 1�� �01� HT46R003B Cost-Effective A/D 8-bit OTP MCU HT46R003B Cost-Effective A/D 8-bit OTP MCU Timer Register – TMR ThetimerregisterisspecialfunctionregisterlocatedintheSpecialPurposeDataMemoryandisthe placewheretheactualtimervalueisstored.TheregisterisknownasTMR.Thevalueinthetimer registerincreasesbyoneeachtimeaninternalclockpulseisreceivedoranexternaltransitionoccurs ontheexternaltimerpin.Thetimerwillcountfromtheinitialvalueloadedbythepreloadregisterto thefullcountofFFHatwhichpointthetimeroverflowsandaninternalinterruptsignalisgenerated. Thetimervaluewillthenresetwiththeinitialpreloadregistervalueandcontinuecounting. NotethattoachieveamaximumfullrangecountofFFH,thepreloadregistermustfirstbecleared. Itshouldbenotedthatafterpower-on,thepreloadregisterwillbeinanunknowncondition.Note thatiftheTimer/EventCounterisinanOFFconditionanddataiswrittentoitspreloadregister, thisdatawillbeimmediatelywrittenintotheactualcounter.However,ifthecounterisenabledand counting,anynewdatawrittenintothepreloaddataregisterduringthisperiodwillremaininthe preloadregisterandwillonlybewrittenintotheactualcounterthenexttimeanoverflowoccurs. Timer Control Register – TMRC TheflexiblefeaturesoftheHoltekmicrocontrollerTimer/EventCounterenableittooperateinthree differentmodes,theoptionsofwhicharedeterminedbythecontentsoftheirrespectivecontrol register. TheTimerControlRegisterisknownasTMRC.ItistheTimerControlRegistertogetherwithits correspondingtimerregisterthatcontrolsthefulloperationoftheTimer/EventCounter.Before thetimercanbeused,itisessentialthattheTimerControlRegisterisfullyprogrammedwiththe rightdatatoensureitscorrectoperation,aprocessthatisnormallycarriedoutduringprogram initialization. Toselectwhichofthethreemodesthetimeristooperatein,eitherinthetimermode,theevent countingmodeorthepulsewidthcapturemode,bits7and6oftheTimerControlRegister,which areknownasthebitpairTM1/TM0,mustbesettotherequiredlogiclevels.Thetimer-onbit,which isbit4oftheTimerControlRegisterandknownasTON,providesthebasicon/offcontrolofthe respectivetimer.Settingthebittohighallowsthecountertorun.Clearingthebitstopsthecounter. Bits0~2oftheTimerControlRegisterdeterminethedivisionratiooftheinputclockprescaler.The prescalerbitsettingshavenoeffectifanexternalclocksourceisused.Ifthetimerisintheevent countorpulsewidthcapturemode,theactivetransitionedgeleveltypeisselectedbythelogiclevel ofbit3oftheTimerControlRegisterwhichisknownasTEG. TMRC Register Bit 7 6 5 4 3 2 1 0 Name TM1 TM0 — TON TEG TPSC� TPSC1 TPSC0 R/W R/W R/W — R/W R/W R/W R/W R/W POR 0 0 — 0 1 0 0 0 Bit7~6 TM1~TM0:Timeroperationmodeselection 00:Nomodeavailable 01:Eventcountermode 10:Timermode 11:Pulsewidthcapturemode Bit5 Unimplemented,readas"0" Bit4 TON:Timer/eventcountercountingenable 0:Disable 1:Enable |
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Description similaire - HT46R003B |
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