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HT37B90 Fiches technique(PDF) 22 Page - Holtek Semiconductor Inc

No de pièce HT37B90
Description  HT37B90
Download  80 Pages
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Fabricant  HOLTEK [Holtek Semiconductor Inc]
Site Internet  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

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HT37B90/HT37B70/HT37B50/HT37B30
Rev.1.00
22
June22,2017
· A/DInputs
The HT37B90/70/50/30 have 8 A/D converter channel
inputs. All of these analog inputs are pin-shared with
PB0 to PB7. If these pins are to be used as A/D inputs
and not as normal I/O pins then the corresponding bits
in the A/D Converter Control Register, ADCR.3~5 and
ADSR.4, must be properly set. There are no configu-
ration options associated with the A/D function. If
used as I/O pins, then full pull-high resistor selections
remain, however if used as A/D inputs then any
pull-high resistor selections associated with these
pinswillbeautomaticallydisconnected.
· CR/FanalogswitchInputs
The HT37B90/70/50/30 have 8 CR/F converter in-
puts. All of these analog inputs are pin-shared with
PC0 to PC7. If these pins are to be used as CR/F ana-
log switch Inputs and not as normal I/O pins then the
corresponding bits in the Option,
²PC0~7 share pin
configuration
². All of these analog inputs are
pin-shared with PC0 to PC7. If these pins are to be
used as CR/F analog switch Inputs and not as normal
I/O pins then the corresponding bits in the configura-
tion,
²PC0~7sharepinconfiguration².
· CR/Foscillatorpin
The HT37B90/70/50/30 have 4 CR/F oscillator pins. All
of these CR/F oscillator pin are pin-shared with PD0 to
PD3. If these pins are to be used as CR/F oscillator
pins and not as normal I/O pins then the corresponding
bits in the Option,
²PD0~3 share pin Option².
· UART pin
The device have 3 UART pins. All of these UART pins
are pin-shared with PE0 to PE2. If these pins are to be
used as UART pins and not as normal I/O pins then
the corresponding bits in the PE share pin configura-
tionoption.
· SPI pin
The device have 4 SPI pins. All of these SPI pins are
pin-shared with PE3 to PE6. If these pins are to be
used as SPI pins and not as normal I/O pins then the
corresponding bits in the PE share pin configuration
option.
I/OPinStructures
The diagrams illustrate the I/O pin internal structures. As
the exact logical construction of the I/O pin may differ
from these drawings, they are supplied as a guide only
to assist with the functional understanding of the I/O
pins.
ProgrammingConsiderations
Within the user program, one of the first things to con-
sider is port initialization. After a reset, the PA~PE data
register and PAC~PEC port control register will be set
high. This means that all I/O pins will default to an input
state, the level of which depends on the other connected
circuitry and whether pull-high options have been se-
lected. If the PAC port control register, is then pro-
grammed to setup some pins as outputs, these output
pins will have an initial high output value unless the as-
sociated PA port data register is first programmed. Se-
lecting which pins are inputs and which are outputs can
be achieved byte-wide by loading the correct value into
the port control register or by programming individual
bits in the port control register using the
²SET [m].i² and
²CLR [m].i² instructions.
Note that when using these bit control instructions, a
read-modify-write operation takes place. The
microcontroller must first read in the data on the entire
port, modify it to the required new bit values and then re-
writethisdatabacktotheoutputports.
MU
X
D a t a B u s
W r i t e C o n t r o l R e g i s t e r
C h i p R e s e t
R e a d C o n t r o l R e g i s t e r
W r i t e I / O
R e a d I / O
S y s t e m W a k e - U p
W e a k
P u l l - u p
M a s k O p t i o n
M a s k O p t i o n
V D D
V D D
I / O L i n e
D
Q
C K
S
Q
D
Q
C K
S
Q
C o n t r o l B i t
D a t a B i t
Input/OutputPort
T 1
T 2
T 3
T 4
T 1
T 2
T 3
T 4
W r i t e t o P o r t
R e a d f r o m P o r t
S y s t e m C l o c k
P o r t D a t a
Read/WriteTiming


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