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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TPS40061PWPR Fiches technique(PDF) 8 Page - Texas Instruments |
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TPS40061PWPR Fiches technique(HTML) 8 Page - Texas Instruments |
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8 / 39 page  R KFF + VIN (min) * 3.5 65.27 R T ) 1502 (W) 100 0 200 300 400 500 600 400 600 800 1000 700 200 800 FEED-FORWARD IMPEDANCE vs SWITCHING FREQUENCY fSW - Switching Frequency - kHz VIN = 25 V VIN = 15 V VIN = 9 V fSW - Switching Frequency - kHz TIMING RESISTANCE vs SWITCHING FREQUENCY 0 100 0 200 400 600 800 1000 200 300 400 500 600 R KFF + VIN (min) * 3.5 65.27 R T ) 1502 (W) TPS40060 TPS40061 SLUS543F – DECEMBER 2002 – REVISED JUNE 2013 www.ti.com The PWM ramp must be faster than the master clock frequency or the PWM is prevented from starting. The PWM ramp time is programmed via a single resistor (RKFF) pulled up to VIN. RKFF is related to RT, and the minimum input voltage, VIN(min) through the following: where: • VIN is the desired start-up (UVLO) input voltage • RT is the timing resistor in kΩ (2) See the section on UVLO operation for further description. The curve showing the feedforward impedance required for a given switching frequency, fSW, at various input voltages is shown in Figure 3. For low input voltage and high duty cycle applications, the voltage feed-forward may limit the duty cycle prematurely. This does not occur for most applications. The voltage control loop controls the duty cycle and regulates the output voltages. For more information on large duty cycle operation, refer to Application Note (SLUA310). Figure 2. Figure 3. UVLO OPERATION The TPS40060 and TPS40061 use both fixed and variable (user programmable) UVLO protection. The fixed UVLO monitors the BP10 and BP5 bypass voltages. The UVLO circuit holds the soft-start low until the BP5 and BP10 voltage rails have exceeded their thresholds and the input voltage has exceed the user programmable undervoltage threshold. The TPS40060 and TPS40061 use the feed-forward pin, KFF, as a user programmable low-line UVLO detection. This variable low-line UVLO threshold compares the PWM ramp duration to the oscillator clock period. An undervoltage condition exists if the device receives a clock pulse before the ramp has reached 90% of its full amplitude. The ramp duration is a function of the ramp slope, which is directly related to the current into the KFF pin. The KFF current is a function of the input voltage and the resistance from KFF to the input voltage. The KFF resistor can be referenced to the oscillator frequency as described in Equation 3: 8 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: TPS40060 TPS40061 |
Numéro de pièce similaire - TPS40061PWPR |
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Description similaire - TPS40061PWPR |
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