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TPS62056DGSR Fiches technique(PDF) 3 Page - Texas Instruments

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No de pièce TPS62056DGSR
Description  800-mA Synchronous Step-Down Converter
Download  30 Pages
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPS62056DGSR Fiches technique(HTML) 3 Page - Texas Instruments

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1
2
3
4
5
10
9
8
7
6
VIN
LBO
GND
PG
FB
PGND
SW
EN
SYNC
LBI
TPS62050, TPS62051, TPS62052, TPS62054, TPS62056
www.ti.com
SLVS432F – SEPTEMBER 2002 – REVISED JUNE 2015
6 Device Comparison Table
PACKAGED DEVICES
OUTPUT VOLTAGE
LBI/LBO FUNCTIONALITY
PLASTIC MSOP(1) (DGS)
TPS62050DGS
Adjustable 0.7 V to 6 V
Standard
TPS62051DGS
Adjustable 0.7 V to 6 V
Enhanced
TPS62052DGS
1.5 V
Standard
TPS62054DGS
1.8 V
Standard
TPS62056DGS
3.3 V
Standard
(1)
The DGS packages are available taped and reeled. Add an R suffix to the device type (that is, TPS62050DGSR) to order quantities of
2500 devices per reel.
7 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
EN
8
I
Enable. A logic high enables the converter, logic low forces the device into shutdown mode, reducing the supply
current to less than 2 µA.
FB
5
I
Feedback pin for the fixed output voltage option. For the adjustable version, an external resistive divider is
connected to this pin. The internal voltage divider is disabled for the adjustable version.
GND
3
I
Ground
LBI
6
I
Low battery input.
LBO
2
O
Open-drain low battery output. Logic low signal indicates a low battery voltage.
PG
4
O
Power good comparator output. This is an open-drain output. A pullup resistor must be connected between PG
and VOUT. The output floats when the output voltage is greater than 95% of the nominal value.
PGND
10
I
Power ground. Connect all power grounds to this pin.
SW
9
O
Connect the inductor to this pin. This pin is the switch pin and connected to the drain of the internal power
MOSFETS.
SYNC
7
I
Input for synchronization to the external clock signal. This input can be connected to an external clock or pulled to
GND or VI. When an external clock signal is applied, the device synchronizes to this external clock and the device
operates in fixed PWM mode. When the pin is pulled to either GND or VI, the internal oscillator is used and the
logic level determines if the device operates in fixed PWM or PWM/PFM mode.
SYNC = HIGH: Low-noise mode enabled, fixed-frequency PWM operation is forced.
SYNC = LOW (GND): Power save mode enabled, PFM/PWM mode enabled.
VIN
1
I
Supply voltage input.
Copyright © 2002–2015, Texas Instruments Incorporated
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Product Folder Links: TPS62050 TPS62051 TPS62052 TPS62054 TPS62056


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