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TPS71501DCKRG4 Fiches technique(PDF) 11 Page - Texas Instruments

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No de pièce TPS71501DCKRG4
Description  50-mA, 24-V, 3.2-uA Supply Current Low-Dropout Linear Regulator in SC70 Package
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Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

TPS71501DCKRG4 Fiches technique(HTML) 11 Page - Texas Instruments

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OUT
REF
V
R1
1
2
V
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OUT
REF
R1
V
V
1
R2
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DS(ON)
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DO
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RATED
TPS715
www.ti.com
SLVS338R – MAY 2001 – REVISED APRIL 2015
8.2.2 Detailed Design Procedure
8.2.2.1 External Capacitor Requirements
Although not required, a 0.047-
μF or larger input bypass capacitor, connected between IN and GND and located
close to the device, is recommended to improve transient response and noise rejection of the power supply as a
whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and
the device is located several inches from the power source.
The TPS715 requires an output capacitor connected between OUT and GND to stabilize the internal control loop.
Any capacitor (including ceramic and tantalum) greater than or equal to 0.47
μF properly stabilizes this loop. X7R
or X5R type capacitors are recommended due to their wider temperature spec and lower temperature coefficient,
but other types of capacitors may be used.
8.2.2.2 Dropout Voltage (VDO)
Generally speaking, the dropout voltage often refers to the voltage difference between the input and output
voltage (VDO = VIN – VOUT). However, in the Electrical Characteristics, VDO is defined as the VIN – VOUT voltage at
the rated current, where the pass-FET is fully on in the ohmic region of operation and is characterized by the
classic RDS(on) of the FET. VDO indirectly specifies a minimum input voltage above the nominal programmed
output voltage at which the output voltage is expected to remain within its accuracy boundary. If the input falls
below this VDO limit (VIN < VOUT + VDO), then the output voltage decreases in order to follow the input voltage.
Dropout voltage is always determined by the RDS(on) of the main pass-FET. Therefore, if the LDO operates below
the rated current, then the VDO for that current scales accordingly. RDS(on) can be calculated using Equation 1:
(1)
8.2.2.3 Setting VOUT for the TPS71501 Adjustable LDO
The TPS715 family contains an adjustable-version, TPS71501, which sets the output voltage using an external
resistor divider as shown in Figure 13. The output voltage operating range is 1.2 V to 15 V, and is calculated
using:
where
VREF = 1.205 V (typical)
(2)
Resistors R1 and R2 should be chosen to allow approximately 1.5-
μA of current through the resistor divider.
Lower value resistors can be used for improved noise performance, but will consume more power. Higher
resistor values should be avoided as leakage current into or out of FB across R1/R2 creates an offset voltage
that is proportional to VOUT divided by VREF. The recommended design procedure is to choose R2 = 1 MΩ to set
the divider current at 1.5
μA, and then calculate R1 using Equation 3:
(3)
Figure 13 shows this configuration.
Copyright © 2001–2015, Texas Instruments Incorporated
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