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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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DLPC200 Fiches technique(PDF) 7 Page - Texas Instruments |
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DLPC200 Fiches technique(HTML) 7 Page - Texas Instruments |
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7 / 52 page  DLPC200 www.ti.com DLPS014E – APRIL 2010 – REVISED AUGUST 2014 Pin Functions (continued) PIN I/O CLOCK SYSTEM DESCRIPTION TYPE(1) NAME NUMBER PORT 2 VIDEO DATA AND CONTROL(3) PORT2_CLK Y2 Pixel clock (if not used, apply 10-k Ω pulldown to DGND) PORT2_VSYNC AF2 PORT2_CLK Vertical sync; weak pullup applied PORT2_HSYNC AB6 PORT2_CLK Horizontal sync; weak pullup applied PORT2_IVALID W1 PORT2_CLK Data valid (if not used, apply 10-k Ω pulldown to DGND) PORT2_D0 Y1 PORT2_CLK Pixel data – Blue 0 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D1 AE1 PORT2_CLK Pixel data – Blue 1 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D2 U2 PORT2_CLK Pixel data – Blue 2 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D3 AD12 PORT2_CLK Pixel data – Blue 3 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D4 AB1 PORT2_CLK Pixel data – Blue 4 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D5 V3 PORT2_CLK Pixel data – Blue 5 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D6 U5 PORT2_CLK Pixel data – Blue 6 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D7 T3 PORT2_CLK Pixel data – Blue 7 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D8 AD1 PORT2_CLK Pixel data – Green 0 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D9 AA3 PORT2_CLK Pixel data – Green 1 (if not used, apply 10-k Ω pulldown to DGND) I1 PORT2_D10 R6 PORT2_CLK Pixel data – Green 2 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D11 W3 PORT2_CLK Pixel data – Green 3 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D12 AB5 PORT2_CLK Pixel data – Green 4 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D13 AD3 PORT2_CLK Pixel data – Green 5 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D14 AD5 PORT2_CLK Pixel data – Green 6 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D15 AD4 PORT2_CLK Pixel data – Green 7 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D16 AE5 PORT2_CLK Pixel data – Red 0 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D17 AC11 PORT2_CLK Pixel data – Red 1 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D18 AB8 PORT2_CLK Pixel data – Red 2 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D19 AC7 PORT2_CLK Pixel data – Red 3 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D20 AG4 PORT2_CLK Pixel data – Red 4 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D21 AE4 PORT2_CLK Pixel data – Red 5 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D22 AF5 PORT2_CLK Pixel data – Red 6 (if not used, apply 10-k Ω pulldown to DGND) PORT2_D23 AF3 PORT2_CLK Pixel data – Red 7 (if not used, apply 10-k Ω pulldown to DGND) SYNC IN/SYNC OUT PORT1_Trig_in F2 I3 PORT1_CLK Alternate sync for port 1; treated as Vsync; weak pullup applied PORT1_Sync_out H6 O3 Async Reserved for future use PORT2_Trig_in AB7 I1 PORT2_CLK Alternate sync for port 2; treated as vsync; weak pullup applied PORT2_Sync_out Y3 O1 Async Reserved for future use (3) 24-bit data is mapped according to RGB888 pixel format. See Figure 13. Copyright © 2010–2014, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: DLPC200 |
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