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CD74HC595MT Fiches technique(PDF) 1 Page - Texas Instruments |
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CD74HC595MT Fiches technique(HTML) 1 Page - Texas Instruments |
1 / 22 page CD74HC595 8BIT SHIFT REGISTERS WITH 3STATE OUTPUT REGISTERS SCHS353 − JANUARY 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 8-Bit Serial-In, Parallel-Out Shift D Wide Operating Voltage Range of 2 V to 6 V D High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 14 ns D ±6-mA Output Drive at 5 V D Low Input Current of 1 µA Max D Shift Register Has Direct Clear description/ordering information The CD74HC595 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial output for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP − E Tube of 25 CD74HC595E CD74HC595E SOIC − DW Tube of 40 CD74HC595DW HC595M SOIC − DW Reel of 2000 CD74HC595DWR HC595M Tube of 40 CD74HC595M −55 °C to 125°C SOIC − M Reel of 2500 CD74HC595M96 HC595M −55 C to 125 C SOIC − M Reel of 250 CD74HC595MT HC595M SOP − NS Reel of 2000 CD74HC595NSR HC595M SSOP − SM Tube of 80 CD74HC595SM HJ595 SSOP − SM Reel of 2000 CD74HC595SM96 HJ595 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DW, E, M, NS, OR SM PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 QB QC QD QE QF QG QH GND VCC QA SER OE RCLK SRCLK SRCLR QH′ PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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