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SI8465DB Fiches technique(PDF) 7 Page - Vishay Siliconix |
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SI8465DB Fiches technique(HTML) 7 Page - Vishay Siliconix |
7 / 8 page Document Number: 65363 S09-1922-Rev. A, 28-Sep-09 www.vishay.com 7 Vishay Siliconix Si8465DB PACKAGE OUTLINE MICRO FOOT: 4-BUMP (2 x 2, 0.5 mm PITCH) Notes (Unless otherwise specified): 1. All dimensions are in millimeters. 2. Four (4) solder bumps are lead (Pb)-free 95.5Sn/3.8Ag/0.7Cu with diameter ∅ 0.30 mm to 0.32 mm. 3. Backside surface is coated with a Ti/Ni/Ag layer. 4. Non-solder mask defined copper landing pad. 5. • is location of pin 1. Notes: a. Use millimeters as the primary measurement. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?65363. S D G S XXX 8465 e D s 4 x Ø b 2 1 4 3 Recommended Land Mark on Backside of Die 4 x Ø 0.24 to 0.26 Note 4 Solder Mask ~ Ø 0.25 Bump Note 2 Dim. Millimetersa Inches Min. Nom. Max. Min. Nom. Max. A 0.462 0.505 0.548 0.0181 0.0198 0.0215 A1 0.220 0.250 0.280 0.0086 0.0098 0.0110 A2 0.242 0.255 0.268 0.0095 0.0100 0.0105 b 0.300 0.310 0.320 0.0118 0.0122 0.0126 e 0.500 0.0197 s 0.230 0.250 0.270 0.0090 0.0098 0.0106 D 0.920 0.960 1.000 0.0362 0.0378 0.0394 |
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