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TEA1200TS Fiches technique(PDF) 5 Page - NXP Semiconductors |
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TEA1200TS Fiches technique(HTML) 5 Page - NXP Semiconductors |
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5 / 24 page  2002 May 14 5 Philips Semiconductors Product specification 0.95 V starting DC-to-DC converter with low battery indicator TEA1200TS PINNING SYMBOL PIN DESCRIPTION LX1 1 inductor connection 1 SHDWN0 2 DC-to-DC converter shut-down input UPOUT/DNIN 3 up mode: DC-to-DC converter output; down mode DC-to-DC converter input UPOUT/DNIN 4 up mode: DC-to-DC converter output; down mode DC-to-DC converter input ILIM 5 current limiting resistor connection n.c. 6 not connected Vref 7 reference voltage input GND 8 internal supply ground LBI1 9 low battery detector input 1 LBO 10 low battery detector output Vref 11 reference voltage input FB0 12 DC-to-DC converter feedback input GND0 13 DC-to-DC converter ground SYNC/PWM 14 synchronization clock input or PWM-only selection input U/D 15 conversion mode selection input LX2 16 inductor connection 2 handbook, halfpage TEA1200TS MBL419 1 2 3 4 5 6 7 8 LX1 SHDWN0 UPOUT/DNIN UPOUT/DNIN ILIM n.c. Vref GND LX2 U/D SYNC/PWM GND0 FB0 Vref LBO LBI1 16 15 14 13 12 11 10 9 Fig.2 Pin configuration. FUNCTIONAL DESCRIPTION Control mechanism The TEA1200TS DC-to-DC converter is able to operate in the PFM (discontinuous conduction) or PWM (continuous conduction) operating mode. All switching actions are completely determined by a digital control circuit which uses the output voltage level as its control input. This novel digital approach enables the use of a new pulse width and frequency modulation scheme, which ensures optimum power efficiency over the complete range of operation of the converter. When high output power is requested, the device will operate in the PWM operating mode. This results in minimum AC currents in the circuit components and hence optimum efficiency, minimum costs and low EMC. In this operating mode, the output voltage is allowed to vary between two predefined voltage levels. As long as the output voltage stays within this so-called window, switching continues in a fixed pattern. When the output voltage reaches one of the window borders, the digital controller immediately reacts by adjusting the pulse width and inserting a current step in such a way that the output voltage stays within the window with higher or lower current capability. This approach enables very fast reaction to load variations. Figure 3 shows the response of the converter to a sudden load increase. The upper trace shows the output voltage. The ripple on top of the DC level is a result of the current in the output capacitor, which changes in sign twice per cycle, times the internal Equivalent Series Resistance (ESR) of the capacitor. After each ramp-down of the inductor current, i.e. when the ESR effect increases the output voltage, the converter determines what to do in the next cycle. As soon as more load current is taken from the output the output voltage starts to decay. |
Numéro de pièce similaire - TEA1200TS |
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Description similaire - TEA1200TS |
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