15V

9V

MCU

Si8286

GNDA

4

VO

11

VSSB

9

IN-

2

IN+

1

DSAT

14

VDDA

3

VDDB

13

VMID

16

/FLT

6

NC

7

VDDB

12

/RST

5

NC

8

NC

15

VSSB

10

+3.3V

0.1uF

Q1

Q2

+ RAIL

- RAIL

RH

10uF

0.1uF

0.1uF

close to Q1 as possible

RL

Figure 3.3. Recommended Si8286 Application Circuit with RH and RL

The Si828x has both inverting and non-inverting gate control inputs (IN– and IN+). In normal operation, one of the inputs is not used,

and should be connected to GNDA (IN–) or VDDA (IN+) respectively for proper logic termination. The Si828x has an active low reset

input (RSTb), an active high ready (RDY) push pull output, and an open drain fault (FLTb) output that requires a weak 10 kΩ pull-up

resistor. The FLTb outputs from multiple Si828x devices can be connected in an OR wiring configuration to provide one single FLTb

signal to the MCU. The Si828x gate driver will shut down when a fault is detected. It then provides FLTb indication to the MCU, and

remains in the shutdown state until the MCU applies a reset signal.

To power the Si828x, the supply for VDDA should be able to handle 10 mA of current and the supplies to VDDB, and VSSB have to be

able to handle 20 mA. Each supply should have 0.1 µF bypass capacitors to provide large switching transient current. The VSSB supply

is optional but it operates better with the CLMP circuit to secure the IGBT in the off state against the collector to gate Miller current.

VSSB should be shorted to VMID if VSSB supply is not available.

The desaturation sensing circuit consisted of the 100 pF blanking capacitor, 100 Ω current limiting resistor, and DSAT diode. These

components provide current and voltage protection for the Si828x desaturation DSAT pin and it is critical to place these components as

close to the IGBT as possible. Also, on the layout, make sure that the loop area forming between these components and the IGBT be

minimized for optimum desaturation detection. The Si8285 has VH and VL gate drive outputs with external 10 Ω resistors to limit output

gate current. The value of these resistors can be adjusted to independently control IGBT collector voltage rise and fall time. The Si8286

only has one VO gate drive output with an external 10 Ω resistor to control IGBT collector voltage rise and fall time. The CLMP output

should be connected to the gate of the IGBT directly to provide clamping action between the gate and VSSB. This clamping action

dissipates IGBT Miller current from collector to the gate to secure the IGBT in the off-state.

3.1.1 Power

To power the Si828x, the supply for VDDA should be able to handle 10 mA of current, the VDDB, and VSSB have to be able to handle

the Si828x biasing current plus the average IGBT gate current drive (see 3.3 Power Dissipation Considerations). Each supply should

have 0.1 μF bypass capacitor to provide large switching transient current in parallel with a 10 μF capacitor. The VSSB supply is option-

al, but it operates better with the CLMP circuit to secure the IGBT in the off state against the collector to gate Miller current. The VSSB

pin should be shorted to VMID if VSSB supply is not available.

3.1.2 Inputs

The Si828x has both inverting and non-inverting gate control inputs (IN– and IN+). In normal operation, one of the inputs is not used

and should be connected to GNDA (IN–) or VDDA (IN+) for proper logic termination. Inputs should be driven by CMOS level push-pull

output. If input is driven by the MCU GPIO, it is recommended that the MCU be located as closed to the Si828x as possible to minimize

PCB trace parasitic and noise coupling to the input circuit.

Si8285/86 Data Sheet

Applications Information

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