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MC145074D Fiches technique(PDF) 3 Page - Motorola, Inc |
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MC145074D Fiches technique(HTML) 3 Page - Motorola, Inc |
3 / 14 page MC145074 3 MOTOROLA AC ELECTRICAL CHARACTERISTICS (Full Temperature and Voltage Ranges per Operation Ranges Table at 50 pf Loads on Outputs) Symbol Parameter Figure Guaranteed Limit Unit Operating Frequency Xin (DIV2 = 0) (DIV2 = 1) 18.5 37.0 MHz Bit Clock Frequency 18.5 MHz tr, tf Maximum Rise and Fall Times (BCKL, WCLK) 2, 5 6 ns tPLH tTLH Xout L–H Propagation Delay Xout Rise Time 2 30 15 ns tPHL tTHL Xout H–L Propagation Delay Xout Fall Time 2 30 15 ns tPLH tTLH DOL, DOR L–H Propagation Delays DOL, DOR Rise Time 3 15 5 ns tPHL tTHL DOL, DOR H–L Propagation Delays DOL, DOR Fall Time 3 15 5 ns tPLH tTLH WCLK Output L–H Propagation Delay WCLK Output Rise Time 4 15 5 ns tPHL tTHL WCLK Output H–L Propagation Delay WCLK Output Fall Time 4 15 5 ns tsu th DIR Master Program Mode Minimum Setup Time DIR Master Program Mode Minimum Hold Time 5 5 5 ns tsu th DIR, DIL Minimum Setup Time DIR, DIL Minimum Hold Time 5 5 5 ns tsu th WCLK Minimum Setup Time to BCLK (not DMODE = WDLY = 1) WCLK Minimum Hold Time to BCLK (not DMODE = WDLY = 1) 6 5 5 ns tsu th WCLK Minimum Setup Time to Xin (not DMODE = WDLY = 1) WCLK Minimum Hold Time to Xin (not DMODE = WDLY = 1) 6 5 5 ns tsu th WCLK Minimum Setup Time to BCLK (DMODE = WDLY = 1) WCLK Minimum Hold Time to BCLK (DMODE = WDLY = 1) 7 5 5 ns tLAG tLEAD BCLK to Xin (1st Edge Only) Lag Time (DMODE = WDLY = 1) BCLK to Xin (1st Edge Only) Lead Time (DMODE = WDLY = 1) 7 5 5 ns |
Numéro de pièce similaire - MC145074D |
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Description similaire - MC145074D |
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