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ADF4356BCPZ-RL7 Fiches technique(PDF) 8 Page - Analog Devices |
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ADF4356BCPZ-RL7 Fiches technique(HTML) 8 Page - Analog Devices |
8 / 35 page ADF4356 Data Sheet Rev. 0 | Page 8 of 35 Pin No. Mnemonic Description 20 VTUNE Control Input to the VCO. This voltage determines the output frequency and is derived from filtering the CPOUT output voltage. The capacitance at this pin (VTUNE input capacitance) is 9 pF. 22 NIC No Internal Connection. For existing designs that currently use the ADF4355, to upgrade to the ADF4356, the RSET resistor can be left connected to this pin. 23 VREF Internal Compensation Node. DC biased at half the tuning range. Connect decoupling capacitors to the ground plane as close to this pin as possible. 24 VBIAS Reference Voltage. Connect a 100 nF decoupling capacitor to the ground plane as close to this pin as possible. 25, 32 CREG1, CREG2 Outputs from the LDO Regulator. CREG1 and CREG2 are the supply voltages to the digital circuits. Nominal voltage of 1.8 V. Decoupling capacitors of 100 nF connected to AGND are required for these pins. 26 PDBRF RF Power-Down. A logic low on this pin mutes the RF outputs. This mute function is also software-controllable. Do not leave this pin floating. 27 DVDD Digital Power Supply. This pin must be at the same voltage as AVDD. Place decoupling capacitors to the ground plane as close to this pin as possible. 28 REFINB Complementary Reference Input. If unused, ac couple this pin to AGND. 29 REFINA Reference Input. 30 MUXOUT Multiplexer Output. The multiplexer output allows the digital lock detect, the analog lock detect, scaled RF, or the scaled reference frequency to be externally accessible. 31 SDGND Digital Σ-Δ Modulator Ground. SDGND is the ground return path for the Σ-Δ modulator. EP Exposed Pad. The exposed pad must be connected to AGND. |
Numéro de pièce similaire - ADF4356BCPZ-RL7 |
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Description similaire - ADF4356BCPZ-RL7 |
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