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ADV7613 Fiches technique(PDF) 10 Page - Analog Devices

No de pièce ADV7613
Description  Integrated consumer electronics control
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADV7613 Fiches technique(HTML) 10 Page - Analog Devices

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Data Sheet
ADV7613
Rev. A | Page 9 of 13
Pin No
Mnemonic
Type
Description
B2
HPA_A
Miscellaneous
digital
Hot Plug Assert. This pin can be configured to output the hot plug assert
signal for HDMI Port A.
B3
CEC
Digital
input/output
Consumer Electronics Control Channel.
B5
XTALN
Miscellaneous
analog
Crystal Output.
B6
CS
Miscellaneous
digital
Chip Select. This pin must be set low for the ADV7613 to process I2C
messages. Pulling this line up causes the I2C state machine to ignore I2C
transmission.
B7
INT
Miscellaneous
digital
Interrupt. This pin can be active low or active high, open drain or
transistor to transistor logic (TTL). The events that trigger an interrupt are
under user configuration.
B8
SDA
Miscellaneous
digital
I2C Port Serial Data Input/Output. SDA is the data line for the control port.
B9
AP4
Audio output
Audio Output 4. This pin is configurable to output S/PDIF digital audio,
HBR, or I2S.
B10
AP3
Audio output
Audio Output 3. This pin is configurable to output S/PDIF digital audio,
HBR, or I2S.
C1
RXA_C+
HDMI input
Digital Input Clock True of HDMI Port A.
C2
RXA_C−
HDMI input
Digital Input Clock Complement of HDMI Port A.
C3, D3, E3, G1, G2
CVDD
Power
HDMI Analog Block Supply Voltage (1.8 V).
C6, D6, E6, E7
DVDD
Power
Digital Core Supply Voltage (1.8 V).
C7, C8, D7, D8, E8, E9, F8 to
F10, G8 to G10, H8, H9
TEST0 to
TEST13
Miscellaneous
Test Pins. Connect these pins to ground via 1 kΩ resistors.
C9
AP2
Audio output
Audio Output 2. This pin is configurable to output S/PDIF digital audio,
HBR, DSD, or I2S mode.
C10
AP1
Audio output
Audio Output 1. This pin is configurable to output S/PDIF digital audio,
HBR, or DSD.
D1
RXA_0+
HDMI input
Digital Input Channel 0 True of HDMI Port A.
D2
RXA_0−
HDMI input
Digital Input Channel 0 Complement of HDMI Port A.
D9
MCLKOUT
Audio output
Master Clock. This pin is configurable to output the audio master clock
signal.
D10
SCLK
Audio output
Serial Clock. This pin is configurable to output the audio serial clock.
E1
RXA_1+
HDMI input
Digital Input Channel 1 True of HDMI Port A.
E2
RXA_1−
HDMI input
Digital Input Channel 1 Complement HDMI Port A.
E10
AP0
Audio Output
Audio Output 0. This pin is configurable to output S/PDIF digital audio,
HBR, DSD, or I2S.
F1
RXA_2+
HDMI input
Digital Input Channel 2 True of HDMI Port A.
F2
RXA_2−
HDMI input
Digital Input Channel 2 Complement of HDMI Port A.
F3, G3
TVDD
Power
Termination Supply Voltage (3.3 V).
F7, G7
DVDDIO
Power
Digital I/O Supply Voltage (3.3 V).
H1
LTX2_3−
LVDS output
LVDS Output Channel 3 Complement of LVDS Output Port 2.
H2, H3, H6, H7
LTX_VDD
Power
LVDS Supply Voltage (1.8 V).
H10
LTX1_0−
LVDS output
LVDS Output Channel 0 Complement of LVDS Output Port 1.
J1
LTX2_3+
LVDS output
LVDS Output Channel 3 True of LVDS Output Port 2.
J2
LTX2_C−
LVDS output
LVDS Clock Complement of LVDS Output Port 2.
J3
LTX2_2−
LVDS output
LVDS Output Channel 2 Complement of LVDS Output Port 2.
J4
LTX2_1−
LVDS output
LVDS Output Channel 1 Complement of LVDS Output Port 2.
J5
LTX2_0−
LVDS output
LVDS Output Channel 0 Complement of LVDS Output Port 2.
J6
LTX1_3−
LVDS output
LVDS Output Channel 3 Complement of LVDS Output Port 1.
J7
LTX1_C−
LVDS output
LVDS Clock Complement of LVDS Output Port 1.
J8
LTX1_2−
LVDS output
LVDS Output Channel 2 Complement of LVDS Output Port 1.
J9
LTX1_1−
LVDS output
LVDS Output Channel 1 Complement of LVDS Output Port 1.
J10
LTX1_0+
LVDS output
LVDS Output Channel 0 True of LVDS Output Port 1.
K2
LTX2_C+
LVDS output
LVDS Clock True of LVDS Output Port 2.
K3
LTX2_2+
LVDS output
LVDS Output Channel 2 True of LVDS Output Port 2.


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