Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

DAC38RF90 Fiches technique(PDF) 5 Page - Texas Instruments

Click here to check the latest version.
No de pièce DAC38RF90
Description  Dual- or Single-Channel, Single-Ended or Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip PLL
Download  152 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  TI1 [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI1 - Texas Instruments

DAC38RF90 Fiches technique(HTML) 5 Page - Texas Instruments

  DAC38RF90 Datasheet HTML 1Page - Texas Instruments DAC38RF90 Datasheet HTML 2Page - Texas Instruments DAC38RF90 Datasheet HTML 3Page - Texas Instruments DAC38RF90 Datasheet HTML 4Page - Texas Instruments DAC38RF90 Datasheet HTML 5Page - Texas Instruments DAC38RF90 Datasheet HTML 6Page - Texas Instruments DAC38RF90 Datasheet HTML 7Page - Texas Instruments DAC38RF90 Datasheet HTML 8Page - Texas Instruments DAC38RF90 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 152 page
background image
5
DAC38RF80, DAC38RF83, DAC38RF84
DAC38RF85, DAC38RF90, DAC38RF93
www.ti.com
SLASEA3 – DECEMBER 2016
Product Folder Links: DAC38RF80 DAC38RF83 DAC38RF84 DAC38RF85 DAC38RF90 DAC38RF93
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Pin Functions - DAC38RF83, DAC38RF93, DAC38RF85
PIN
I/O
DESCRIPTION
NAME
NO.
AGND
C11, C12, D11, E11,
F12, J12, K11, L11,
M11, M12
Analog ground.
ALARM
K8
O
CMOS output for ALARM condition. The ALARM output functionality is defined through the config7
register. Default polarity is active low, but can be changed to active high via config0 alarm_out_pol
control bit.
AMUX0
G3
O
Analog test pin for SerDes, Lane 0 to Lane 3. Can be left floating.
AMUX1
F3
O
Analog test pin for SerDes, Lane 4 to Lane 7. Can be left floating.
ATEST
C8
O
Analog test pin for DAC, references and PLL. Can be left floating.
CLKTX+
A7
O
Divided output clock, positive terminal.
CLKTX-
A6
O
Divided output clock, negative terminal.
DACCLK+
A10
I
Positive external differential clock input for DAC core with a self-bias.
DACCLK-
A9
I
Complementary external differential clock input for DAC core. (see the DACCLK+ description)
DACCLKSE
A12
I
Single ended clock input for DAC core. Can be left floating if not used.
DGND
A2, B2, C2, D2, D6, E2,
E7, F2, F6, G2, G7, H6,
J7, K2, L2, L3, L4, L5,
M6
-
Digital ground.
EXTIO
C10
I/O
Requires a 0.1 μF decoupling capacitor to AGND.
GPI0
K7
-
Factory use only. User should GND.
GPI1
M7
-
Factory use only. User should GND.
GPO0
L7
O
Used for CMOS SYNC0\ signal.
GPO1
L6
O
Used for CMOS SYNC1\ signal.
IFORCE
D3
O
Test pin for on chip parametrics. Can be left floating.
RBIAS
C9
O
Full-scale output current bias. Change the full-scale output current through DACFS in register DACFS
(8.5.72). Expected to be 3.6 kΩ to GND for 40 mA full scale output.
RESET
K9
I
Active low input for chip RESET, which resets all the programming registers to their default state. Internal
pull-up.
RX0+
J1
I
CML SerDes interface lane 0 input, positive
RX0-
K1
I
CML SerDes interface lane 0 input, negative
RX1+
M1
I
CML SerDes interface lane 1 input, positive
RX1-
L1
I
CML SerDes interface lane 1 input, negative
RX2+
M2
I
CML SerDes interface lane 2 input, positive
RX2-
M3
I
CML SerDes interface lane 2 input, negative
RX3+
M5
I
CML SerDes interface lane 3 input, positive
RX3-
M4
I
CML SerDes interface lane 3 input, negative
RX4+
H1
I
CML SerDes interface lane 4 input, positive
RX4-
G1
I
CML SerDes interface lane 4 input, negative
RX5+
E1
I
CML SerDes interface lane 5 input, positive
RX5-
F1
I
CML SerDes interface lane 5 input, negative
RX6+
D1
I
CML SerDes interface lane 6 input, positive
RX6-
C1
I
CML SerDes interface lane 6 input, negative
RX7+
A1
I
CML SerDes interface lane 7 input, positive
RX7-
B1
I
CML SerDes interface lane 7 input, negative
SCLK
L9
I
Serial interface clock. Internal pull-down.
SDEN
M8
I
Active low serial data enable, always an input to the DAC38RFxx. Internal pull-up.
SDIO
M10
I/O
Serial interface data. Bi-directional in 3-pin mode (default) and uni-directional input 4-pin mode. Internal
pull-down.
SDO
M9
O
Uni-directional serial interface data output in 4-pin mode. The SDO pin is tri-stated in 3-pin interface
mode (default).
SLEEP
L8
I
Active high asynchronous hardware power-down input. Internal pull-down.
SYNC0+
C4
O
Synchronization request to transmitter for JESD204B link 0, LVDS positive output.
SYNC0-
C3
O
Synchronization request to transmitter for JESD204B link 0, LVDS negative output.
SYNC1+
C7
O
Synchronization request to transmitter for JESD204B link 1, LVDS positive output.


Numéro de pièce similaire - DAC38RF90

FabricantNo de pièceFiches techniqueDescription
logo
Texas Instruments
DAC38RF90 TI1-DAC38RF90 Datasheet
3Mb / 155P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended or Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip PLL
DAC38RF90 TI1-DAC38RF90 Datasheet
3Mb / 155P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL
DAC38RF90IAAV TI1-DAC38RF90IAAV Datasheet
3Mb / 155P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended or Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip PLL
DAC38RF90IAAV TI1-DAC38RF90IAAV Datasheet
3Mb / 155P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL
DAC38RF90IAAVR TI1-DAC38RF90IAAVR Datasheet
3Mb / 155P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended or Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip PLL
More results

Description similaire - DAC38RF90

FabricantNo de pièceFiches techniqueDescription
logo
Texas Instruments
DAC38RF80 TI1-DAC38RF80_17 Datasheet
3Mb / 155P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended or Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip PLL
DAC38RF80_017 TI1-DAC38RF80_017 Datasheet
3Mb / 155P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL
DAC38RF86 TI1-DAC38RF86 Datasheet
2Mb / 141P
[Old version datasheet]   Dual- or Single-Channel, Single-Ended, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface and On-Chip GSM PLL
DAC38RF82 TI1-DAC38RF82 Datasheet
2Mb / 139P
[Old version datasheet]   Dual-Channel, Differential-Output, 14-bit, 9-GSPS, RF-Sampling DAC with JESD204B Interface, On-Chip PLL and Wide-Band Interpolation
DAC38RF82 TI1-DAC38RF82_17 Datasheet
3Mb / 140P
[Old version datasheet]   Dual-Channel, Differential-Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface, On-Chip PLL and Wide-Band Interpolation
AFE7422 TI1-AFE7422 Datasheet
78Kb / 4P
[Old version datasheet]   Dual-Channel, RF-Sampling AFE With 14-Bit, 9-GSPS DACs and 14-Bit, 3-GSPS ADCs
AFE7422 TI1-AFE7422_V01 Datasheet
362Kb / 8P
[Old version datasheet]   AFE7422 Dual-channel, RF-sampling AFE with 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs
AFE7444 TI1-AFE7444 Datasheet
79Kb / 4P
[Old version datasheet]   Quad-Channel, RF-Sampling AFE With 14-Bit, 9-GSPS DACs and 14-Bit, 3-GSPS ADCs
ADC12DJ5200RF TI1-ADC12DJ5200RF Datasheet
1Mb / 144P
[Old version datasheet]   10.4-GSPS Single-Channel or 5.2-GSPS Dual-Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC)
ADC12DJ3200QML-SP TI1-ADC12DJ3200QML-SP Datasheet
1Mb / 134P
[Old version datasheet]   6.4-GSPS, Single-Channel or 3.2-GSPS, Dual-Channel, 12-Bit, RF-Sampling Analog-to-Digital Converter (ADC)
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Fiches technique Télécharger

Go To PDF Page


Lien URL




Politique de confidentialité
ALLDATASHEET.FR
ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com