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74AHCT164 Fiches technique(PDF) 10 Page - NXP Semiconductors |
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74AHCT164 Fiches technique(HTML) 10 Page - NXP Semiconductors |
10 / 20 page 2000 Aug 15 10 Philips Semiconductors Product specification 8-bit serial-in/parallel-out shift register 74AHC164; 74AHCT164 VCC = 4.5 to 5.5 V; typical values at VCC = 5.0 V tPHL/tPLH propagation delay CP to Qn see Figs 6 and 9 15 pF − 4.5 9.0 1.0 10.5 1.0 11.5 ns tPHL propagation delay MR to Qn see Figs 7 and 9 − 4.0 8.6 1.0 10.0 1.0 11.0 ns fmax maximum clock pulse frequency see Figs 6 and 9 125 175 − 105 − 85 − MHz tPHL/tPLH propagation delay CP to Qn see Figs 6 and 9 50 pF − 6.4 11.0 1.0 12.5 1.0 14.0 ns tPHL propagation delay MR to Qn see Figs 7 and 9 − 5.8 10.6 1.0 12.0 1.0 13.5 ns tW clock pulse width HIGH or LOW see Figs 6 and 9 5.0 −− 5.0 − 5.0 − ns master reset pulse width LOW see Figs 7 and 9 5.0 −− 5.0 − 5.0 − ns tsu set-up time Dsa,Dsb to CP see Figs 8 and 9 4.5 −− 4.5 − 4.5 − ns th hold time Dsa, Dsb to CP see Figs 8 and 9 2.0 −− 2.0 − 2.0 − ns trem removal time MR to CP see Figs 7 and 9 2.5 −− 2.5 − 2.5 − ns fmax maximum clock pulse frequency see Figs 6 and 9 85 115 − 75 − 65 − MHz SYMBOL PARAMETER TEST CONDITIONS Tamb (°C) UNIT WAVEFORMS CL 25 −40 to +85 −40 to +125 MIN. TYP. MAX. MIN. MAX. MIN. MAX. |
Numéro de pièce similaire - 74AHCT164 |
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Description similaire - 74AHCT164 |
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