STM32L052C8 datasheet(7/136 Pages) STMICROELECTRONICS

No de pièce	STM32L052C8

Description	Ultra-low-power 32-bit MCU ARM-based Cortex-M0, up to 64 KB Flash memory, 8 KB SRAM, 2 KB EEPROM, USB, ADC, DAC

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Fabricant	STMICROELECTRONICS [STMicroelectronics]

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STM32L052x6 STM32L052x8

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8

List of figures

Figure 1.

STM32L052x6/8 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 2.

Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 3.

STM32L052x6/8 LQFP64 pinout - 10 x 10 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 4.

STM32L052x6/8 TFBGA64 ballout - 5x 5 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 5.

STM32L052x6/8 LQFP48 pinout - 7 x 7 mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 6.

STM32L052x6/8 WLCSP36 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 7.

STM32L052x6/8 LQFP32 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 8.

STM32L052x6/8 UFQFPN32 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 9.

Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 10.

Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Figure 11.

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Figure 12.

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 13.

Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 14.

IDD vs VDD, at TA= 25/55/85/105 °C, Run mode, code running from

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Flash memory, Range 2, HSE, 1WS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Figure 15.

IDD vs VDD, at TA= 25/55/85/105 °C, Run mode, code running from

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Flash memory, Range 2, HSI16, 1WS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Figure 16.

IDD vs VDD, at TA= 25/55/ 85/105/125 °C, Low-power run mode, code running

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from RAM, Range 3, MSI (Range 0) at 64 KHz, 0 WS . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Figure 17.

IDD vs VDD, at TA= 25/55/ 85/105/125 °C, Stop mode with RTC enabled

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and running on LSE Low drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Figure 18.

IDD vs VDD, at TA= 25/55/85/105/125 °C, Stop mode with RTC disabled,

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all clocks off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Figure 19.

High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Figure 20.

Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Figure 21.

HSE oscillator circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Figure 22.

Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Figure 23.

HSI16 minimum and maximum value versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . 77

Figure 24.

VIH/VIL versus VDD (CMOS I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Figure 25.

VIH/VIL versus VDD (TTL I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Figure 26.

I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Figure 27.

Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Figure 28.

ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Figure 29.

Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Figure 30.

Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . . 95

Figure 31.

Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . . 96

Figure 32.

12-bit buffered/non-buffered DAC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Figure 33.

SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Figure 34.

SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Figure 35.

SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Figure 36.

I2S slave timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Figure 37.

I2S master timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Figure 38.

USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . 110

Figure 39.

LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline . . . . . . . . . . . . . . . . 111

Figure 40.

LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat recommended footprint . . . . . . . . . . 112

Figure 41.

LQFP64 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Figure 42.

TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball

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grid array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

Numéro de pièce similaire - STM32L052C8

Fabricant	No de pièce	Fiches technique	Description
STMicroelectronics	STM32L051C6	1Mb / 127P	Access line ultra-low-power 32-bit MCU ARM-based Cortex-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC
	STM32L051C6	1Mb / 133P	Access line ultra-low-power 32-bit MCU Arm짰-based Cortex짰-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC October 2019
	STM32L051C8	1Mb / 127P	Access line ultra-low-power 32-bit MCU ARM-based Cortex-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC
	STM32L051C8	1Mb / 133P	Access line ultra-low-power 32-bit MCU Arm짰-based Cortex짰-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC October 2019
	STM32L051K6	1Mb / 127P	Access line ultra-low-power 32-bit MCU ARM-based Cortex-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC

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Fabricant	No de pièce	Fiches technique	Description
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STMicroelectronics	STM32L051X6	1Mb / 127P	Access line ultra-low-power 32-bit MCU ARM-based Cortex-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC
NXP Semiconductors	LPC111XLV	1Mb / 53P	32-bit ARM Cortex-M0 MCU; up to 32 kB flash, 8 kB SRAM; 8-bit ADC Rev. 2-10 October 2012
STMicroelectronics	STM32L051X6	1Mb / 133P	Access line ultra-low-power 32-bit MCU Arm짰-based Cortex짰-M0, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, ADC October 2019
NXP Semiconductors	LPC112X	1Mb / 63P	32-bit ARM Cortex-M0 microcontroller; 64 kB flash and 8 kB SRAM; 12-bit ADC Rev. 1-24 February 2015
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Holtek Semiconductor In...	HT32F0008	1Mb / 46P	32-Bit Arm Cortex -M0 Microcontroller, up to 64 KB Flash and 16 KB SRAM
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