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HCPL-2232 Fiches technique(PDF) 11 Page - Agilent(Hewlett-Packard) |
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HCPL-2232 Fiches technique(HTML) 11 Page - Agilent(Hewlett-Packard) |
11 / 16 page 11 Package Characteristics Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note Input-Output Momentary VISO 2500 V rms RH < 50%, t = 1 min. 5, 10 HCNW22XX 5000 TA = 25°C Input-Output Resistance RI-O 1012 Ω VI-O = 500 Vdc 5 HCNW22XX 1012 1013 TA = 25°C 1011 TA = 100°C Input-Output Capacitance CI-O 0.6 pF f = 1 MHz, 5 HCNW22XX 0.5 0.6 TA = 25°C Input-Input Insulation II-I 0.005 µA Relative Humidity = 45%, 12 Leakage Current t = 5 s, VI-I = 500 V Resistance (Input-Input) RI-I 1011 Ω VI-I = 500 V 12 Capacitance (Input-Input) CI-I 0.25 pF f = 1 MHz 12 *The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable), your equipment level safety specification or Agilent Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication number 5963-2203E. Withstand Voltage* VI-O = 0 Vdc Notes: 1. Each channel. 2. Derate total package power dissipation, PT, linearly above 70°C free-air temperature at a rate of 4.5 mW/°C. 3. Duration of output short circuit time should not exceed 10 ms. 4. For single devices, input capacitance is measured between pin 2 and pin 3. 5. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together. 6. The tPLH propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge of the output pulse. The tPHL propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V point on the trailing edge of the output pulse. 7. CMH is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, VO > 2.0 V. CML is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, VO < 0.8 V. 8. For HCPL-2202/12, VO is on pin 6. 9. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 is recommended. 10. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 3000 V rms for one second (leakage detection current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the VDE 0884 Insulation Characteristics Table, if applicable. 11. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage detection current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the VDE 0884 Insulation Characteristics Table. 12. For HCPL-2231/32 only. Measured between pins 1 and 2, shorted together, and pins 3 and 4, shorted together. 5, 11 |
Numéro de pièce similaire - HCPL-2232 |
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Description similaire - HCPL-2232 |
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