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LM2636M Fiches technique(PDF) 11 Page - National Semiconductor (TI) |
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LM2636M Fiches technique(HTML) 11 Page - National Semiconductor (TI) |
11 / 14 page Applications Information (Continued) sient. In the case of Pentium II power supply, fast recovery of the load voltage from transient window back to the steady state window is considered important. This limits the highest inductance value that can be used. The lowest inductance value is limited by the highest switching frequency that can be practically employed. As the switching frequency in- creases, the switching loss in the MOSFETs tends to in- crease, resulting in less converter efficiency and larger heat sinks. A good switching frequency is probably a frequency under which the MOSFET conduction loss is higher than the switching loss because the cost of the MOSFET is directly related to its R DSON. The inductor size can be determined by the following equation: where V O_RIP is the peak-to-peak output ripple voltage, f is the switching frequency. For commonly used low R DSON MOSFETs, a reasonable switching frequency is 300 kHz. As- sume an output peak-peak ripple voltage of 18 mV is to be guaranteed, the total output capacitor ESR is 9 m Ω, the input voltage is 5V, and output voltage is 2.8V. The inductance value according to the above equation will then be 2 µH. The highest slew rate of the inductor current when the load changes from no load to full load can be determined as fol- lows: where D MAX is the maximum allowed duty cycle, which is around 0.9 for LM2636. For a load transient from 0A to 14A, the highest current slew rate of the inductor, according to the above equation, is 0.85A/µs, and therefore the shortest pos- sible total recovery time is 14A/(0.85A/µs) = 16.5 µs. Notice that the output voltage starts to recover whenever the induc- tor starts to supply current. The highest slew rate of the inductor current when the load changes from full load to no load can be determined from the same equation, but use D MIN instead of DMAX. Since the D MIN of LM2636 at 300 kHz is 0%, the slew rate is therefore −1.4A/µs. So the approximate total recovery time will be 14A/(1.4A/µs) = 10 µs. The input inductor is for limiting the input current slew rate during a load transient. In the case that low ESR aluminum electrolytic capacitors are used for the input capacitor bank, voltage change due to capacitor charging/discharging is usu- ally negligible for the first 20 µs. ESR is by far the dominant factor in determining the amount of capacitor voltage undershoot/overshoot due to load transient. So the worst case is when the load changes between no load and full load, under which condition the input inductor sees the high- est voltage change across the input capacitors. Assume the input capacitor bank is made up of three 16MV820GX, i.e., the total ESR is 15 m Ω. Whenever there is a sudden load current change, it has to initially be supported by the input capacitor bank instead of the input inductor. So for a full load swing between 0A and 14A, the voltage seen by the input in- ductor is ∆V=14A x15mΩ = 210 mV. Use the following equation to determine the minimum inductance value: where (di/dt) MAX is the maximum allowable input current slew rate, which is 0.1A/µs in the case of the Pentium II power supply. So the input inductor size, according to the above equation, should be 2.1 µH. DYNAMIC POSITIONING OF LOAD VOLTAGE Since the Intel VRM specifications have defined two operat- ing windows for the MPU core voltage, one being the steady state window and the other the transient window, it is a good idea to dynamically position the steady state output voltage in the steady state window with respect to load current level so that the output voltage has more headroom for load tran- sient response. This requires information about the load cur- rent. There are at least two simple ways to implement this idea with LM2636. One is to utilize the output inductor DC re- sistance, see Figure 7. The average voltage across the out- put inductor is actually that across its DC resistance. That average voltage is proportional to load current. Since the switching node voltage V A bounces between the input voltage and ground at the switching frequency, it is im- possible to choose point A as the feedback point, otherwise the dynamic performance will suffer and the system may have some noise problems. Using a low pass filter network around the inductor, such as the one shown in the figure, seems to be a good idea. The feedback point is C. Since at the switching frequency the impedance of the 0.1 µF is much less than 5 k Ω, the bouncing voltage at point A will be mainly applied across the resistor 5 k Ω, and point C will be much quieter than A. However, V CB average is still the majority of V AB average, because of the resistor divider. So in steady state V C =IO xrL +VCORE, where rL is the inductor DC resistance. So at no load, output voltage is equal to V C, and at full load, output voltage is I O xrL lower than VC. To fur- ther utilize the steady state window, a resistor can be con- nected between the FB pin and ground to increase the no load output voltage to close to the upper limit of the window. DS100834-26 FIGURE 7. Dynamic Voltage Positioning by Utilizing Output Inductor DC Resistance www.national.com 11 |
Numéro de pièce similaire - LM2636M |
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Description similaire - LM2636M |
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