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CAT24C32BAC4 Fiches technique(PDF) 5 Page - ON Semiconductor

No de pièce CAT24C32BAC4
Description  32 Kb I2C CMOS Serial EEPROM 4-ball WLCSP
Download  8 Pages
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Fabricant  ONSEMI [ON Semiconductor]
Site Internet  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CAT24C32BAC4 Fiches technique(HTML) 5 Page - ON Semiconductor

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CAT24C32BC4, CAT24C32BAC4
www.onsemi.com
5
Figure 4. Acknowledge Timing
18
9
START
SCL FROM
MASTER
BUS RELEASE DELAY (TRANSMITTER)
BUS RELEASE DELAY (RECEIVER)
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
ACK SETUP (
≥ tSU:DAT)
ACK DELAY (
≤ tAA)
Figure 5. Bus Timing
SCL
SDA IN
SDA OUT
tSU:STA
tHD:STA
tHD:DAT
tF
tLOW
tAA
tHIGH
tLOW
tR
tDH
tBUF
tSU:DAT
tSU:STO
WRITE OPERATIONS
Byte Write
To write data to memory, the Master creates a START
condition on the bus and then broadcasts a Slave address
with the R/W bit set to ‘0’. The Master then sends two
address bytes and a data byte and concludes the session by
creating a STOP condition on the bus. The Slave responds
with ACK after every byte sent by the Master (Figure 6). The
STOP starts the internal Write cycle, and while this
operation is in progress (tWR), the SDA output is tri−stated
and the Slave does not acknowledge the Master (Figure 7).
Page Write
The Byte Write operation can be expanded to Page Write,
by sending more than one data byte to the Slave before
issuing the STOP condition (Figure 8). Up to 32 distinct data
bytes can be loaded into the internal Page Write Buffer
starting at the address provided by the Master. The page
address is latched, and as long as the Master keeps sending
data, the internal byte address is incremented up to the end
of page, where it then wraps around (within the page). New
data can therefore replace data loaded earlier. Following the
STOP, data loaded during the Page Write session will be
written to memory in a single internal Write cycle (tWR).
Acknowledge Polling
As soon (and as long) as internal Write is in progress, the
Slave will not acknowledge the Master. This feature enables
the Master to immediately follow−up with a new Read or
Write request, rather than wait for the maximum specified
Write time (tWR) to elapse. Upon receiving a NoACK
response from the Slave, the Master simply repeats the
request until the Slave responds with ACK.
Delivery State
The CAT24C32BC4/CAT24C32BAC4 is shipped erased,
i.e., all bytes are FFh.


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