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LMH6732 Fiches technique(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
No de pièce LMH6732
Description  High Speed Op Amp with Adjustable Bandwidth
Download  19 Pages
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

LMH6732 Fiches technique(HTML) 5 Page - National Semiconductor (TI)

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Electrical Characteristics I
CC = 3.4mA (Note 2) (Continued)
A
V = +2, RF =1k
Ω,V
S = ±5V, RL = 100
Ω,R
P = 137k
Ω; Unless otherwise specified.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 6)
Max
(Note 6)
Units
TON
Turn-on Time
0.5V
PP Sine Wave, 90% of
Full Value
42
ns
TOFF
Turn-off Time
0.5V
PP Sine Wave, <5% of
Full Value
10
V
O glitch
Turn-on Glitch
25
mV
FDTH
Feed-Through
f = 10MHz, A
V = +2, Off State
−61
dB
Electrical Characteristics I
CC = 1.0mA (Note 2)
A
V = +2, RF =1k
Ω,V
S = ±5V, RL = 500
Ω,R
P = 412k
Ω; Unless otherwise specified.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 6)
Max
(Note 6)
Units
Frequency Domain Response
SSBW
-3dB Bandwidth
V
OUT =2VPP
55
MHz
LSBW
-3dB Bandwidth
V
OUT = 4.0VPP
30
MHz
GF
0.1dB
0.1dB Gain Flatness
V
OUT =2VPP
20
MHz
GFP
Frequency Response Peaking
DC to 25MHz, V
OUT =2VPP
0.11
dB
GFR
Frequency Response Rolloff
DC to 25MHz, V
OUT =2VPP
0.05
dB
LPD
Linear Phase Deviation
DC to 20MHz, V
OUT =2VPP
1
deg
DC to 14MHz, V
OUT =2VPP
0.3
DG
Differential Gain
R
L = 500
Ω, 4.43MHz
0.020
%
DP
Differential Phase
R
L = 500
Ω, 4.43MHz
0.036
deg
Time Domain Response
TRS
Rise Time
2V Step
3.7
ns
TRL
Fall Time
2V Step
5.1
T
S
Settling Time to 0.04%
A
V = −1, 2V Step
18
ns
OS
Overshoot
2V Step
2
%
SR
Slew Rate
5V Step, 40% to 60%
(Note 5)
400
V/µs
Distortion And Noise Response
HD2
2nd Harmonic Distortion
2V
PP, 5MHz
−43
dBc
HD3
3rd Harmonic Distortion
2V
PP, 5MHz
−65
dBc
THD
Total Harmonic Distortion
2V
PP, 1MHz
−70.0
dBc
V
N
Input Referred Voltage Noise
>1MHz
8.4
nV/
I
N
Input Referred Inverting Noise
Current
>1MHz
9.0
pA/
I
NN
Input Referred Non-Inverting Noise
Current
>1MHz
0.8
pA/
SNF
Noise Floor
>1MHz
−147
dBm
1Hz
INV
Total Integrated Input Noise
1MHz to 100MHz
29
µV
Static, DC Performance
V
IO
Input Offset Voltage
±1.6
±6.0
±7.3
mV
DV
IO
Input Offset Voltage Average Drift
(Note 8)
4
µV/˚C
I
BN
Input Bias Current
Non Inverting (Note 7)
0.04
±2.0
±2.5
µA
DI
BN
Input Bias Current Average Drift
Non-Inverting (Note 8)
−1
nA/˚C
I
BI
Input Bias Current
Inverting (Note 7)
−0.1
±6
±8
µA
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