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S29GL512T11DHIyyx Fiches technique(PDF) 56 Page - Cypress Semiconductor

No de pièce S29GL512T11DHIyyx
Description  1 Gbit (128 Mbyte), 512 Mbit (64 Mbyte)
Download  105 Pages
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Fabricant  CYPRESS [Cypress Semiconductor]
Site Internet  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

S29GL512T11DHIyyx Fiches technique(HTML) 56 Page - Cypress Semiconductor

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Document Number: 002-00247 Rev. *G
Page 56 of 105
S29GL01GT, S29GL512T
Table 7.4 CFI Query Identification String
Word Address
Byte Address
Data
Description
(SA) + 0010h
(SA) + 0011h
(SA) + 0012h
(SA) + 0020h
(SA) + 0022h
(SA) + 0024h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
(SA) + 0013h
(SA) + 0014h
(SA) + 0026h
(SA) + 0028h
0002h
0000h
Primary OEM Command Set
(SA) + 0015h
(SA) + 0016h
(SA) + 002Ah
(SA) + 002Ch
0040h
0000h
Address for Primary Extended Table
(SA) + 0017h
(SA) + 0018h
(SA) + 002Eh
(SA) + 0030h
0000h
0000h
Alternate OEM Command Set
(00h = none exists)
(SA) + 0019h
(SA) + 001Ah
(SA) + 0032h
(SA) + 0034h
0000h
0000h
Address for Alternate OEM Extended Table
(00h = none exists)
Table 7.5 CFI System Interface String
Word Address
Byte Address
Data
Description
(SA) + 001Bh
(SA) + 0036h
0027h
VCC Min. (erase/program) (D7-D4: volts, D3-D0: 100 mV)
(SA) + 001Ch
(SA) + 0038h
0036h
VCC Max. (erase/program) (D7-D4: volts, D3-D0: 100 mV)
(SA) + 001Dh
(SA) + 003Ah
0000h
VPP Min. voltage (00h = no VPP pin present)
(SA) + 001Eh
(SA) + 003Ch
0000h
VPP Max. voltage (00h = no VPP pin present)
(SA) + 001Fh
(SA) + 003Eh
0008h
Typical timeout per single word write 2N µs
(SA) + 0020h
(SA) + 0040h
0009h
Typical timeout for max
multi-byte program, 2N µs
(00h = not supported)
(SA) + 0021h
(SA) + 0042h
000Ah
Typical timeout per individual block erase 2N ms
(SA) + 0022h
(SA) + 0044h
0014h (1 Gb)
0013h (512 Mb)
Typical timeout for full chip erase 2N ms (00h = not supported)
(SA) + 0023h
(SA) + 0046h
0002h (85°C)
0003h (105°C)
Max. timeout for single word write 2N times typical
(SA) + 0024h
(SA) + 0048h
0001h (85°C)
0002h (105°C)
Max. timeout for buffer write 2N times typical
(SA) + 0025h
(SA) + 004Ah
0002h
Max. timeout per individual block erase 2N times typical
(SA) + 0026h
(SA) + 004Ch
0002h
Max. timeout for full chip erase 2N times typical
(00h = not supported)


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