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S29GL01GT11FAIyyx Datasheet(Fiches technique) 85 Page - Cypress Semiconductor

Numéro de pièce S29GL01GT11FAIyyx
Description  1 Gbit (128 Mbyte), 512 Mbit (64 Mbyte)
Télécharger  105 Pages
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Fabricant  CYPRESS [Cypress Semiconductor]
Site Internet  http://www.cypress.com
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S29GL01GT11FAIyyx Datasheet(HTML) 85 Page - Cypress Semiconductor

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Document Number: 002-00247 Rev. *G
Page 85 of 105
S29GL01GT, S29GL512T
Figure 11.13 Read to Write (CE# Toggle) Operation Timing Diagram
Note:
1. Address are Amax:A0 in word mode; Amax:A-1 in byte mode, Data are DQ15-DQ0 in word mode; DQ7-DQ0 in byte mode.
Notes:
1. Not 100% tested.
2. Upon the rising edge of WE#, must wait tSR/W before switching to another address.
3. See Table 5.7 on page 44 and Table 5.8 on page 45 for specific values.
Table 11.10 Erase/Program Operations
Parameter
Description
VIO = 2.7V
to VCC
VIO = 1.65V to
VCC
Unit
JEDEC
Std
tWHWH1
tWHWH1
Write Buffer Program Operation
Typ
(Note 3)
µs
Effective Write Buffer Program Operation per Word
Typ
(Note 3)
µs
Program Operation per Word or Page
Typ
(Note 3)
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note 1)
Typ
(Note 3)
ms
tBUSY
Erase/Program Valid to RY/BY# Delay
Max
80
ns
tSR/W
Latency between Read and Write operations (Note 2)
Min
10
ns
tESL
Erase Suspend Latency
Max
(Note 3)
µs
tPSL
Program Suspend Latency
Max
(Note 3)
µs
tRB
RY/BY# Recovery Time
Min
0
µs
tPPB
PPB Lock Unlock
Min
80
µs
Max
120
tDP
Data Polling to Protected Sector (Program)
Min
3
µs
Max
20
Data Polling to Protected Sector (Erase)
Min
3
Max
100
tVHH
VHH Rise and Fall Time (Note 1)
Min
250
ns
tTOR
Exceeded Timing Cleared (DQ5)
Min
100
ns
Amax-A0
CE#
OE#
WE#
DQ15-DQ0
tACC
tOE
tCE
tAS
tCS
tDS
tAH
tDH
tWP
tCH
tOH
tOH
tOH
tDF
tDF
tGHWL


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