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CY8C4128FNI-BL473 Fiches technique(PDF) 32 Page - Cypress Semiconductor |
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CY8C4128FNI-BL473 Fiches technique(HTML) 32 Page - Cypress Semiconductor |
32 / 47 page PRELIMINARY PSoC® 4: PSoC 4XX8_BLE Family Datasheet Document Number: 001-94624 Rev. *K Page 32 of 47 Internal Low-Speed Oscillator Table 47. IMO AC Specifications Spec ID Parameter Description Min Typ Max Units Details/Conditions SID296 FIMOTOL3 Frequency variation from 3 to 48 MHz –– ±2 % With API-called calibration SID297 FIMOTOL3 IMO startup time – – 12 µs – Table 48. ILO DC Specifications Spec ID Parameter Description Min Typ Max Units Details/Conditions SID298 IILO2 ILO operating current at 32 kHz – 0.3 1.05 µA – Table 49. ILO AC Specifications Spec ID Parameter Description Min Typ Max Units Details/Conditions SID299 TSTARTILO1 ILO startup time – – 2 ms – SID300 FILOTRIM1 32-kHz trimmed frequency 15 32 50 kHz – Table 50. External Clock Specifications Spec ID Parameter Description Min Typ Max Units Details/Conditions SID301 ExtClkFreq External clock input frequency 0 – 48 MHz CMOS input level only SID302 ExtClkDuty Duty cycle; Measured at VDD/2 45 – 55 % CMOS input level only Table 51. UDB AC Specifications Spec ID Parameter Description Min Typ Max Units Details/Conditions Data Path performance SID303 FMAX-TIMER Max frequency of 16-bit timer in a UDB pair –– 48 MHz – SID304 FMAX-ADDER Max frequency of 16-bit adder in a UDB pair –– 48 MHz – SID305 FMAX_CRC Max frequency of 16-bit CRC/PRS in a UDB pair –– 48 MHz – PLD Performance in UDB SID306 FMAX_PLD Max frequency of 2-pass PLD function in a UDB pair –– 48 MHz – Clock to Output Performance SID307 TCLK_OUT_UDB1 Prop. delay for clock in to data out at 25 °C, Typical –15 – ns – SID308 TCLK_OUT_UDB2 Prop. delay for clock in to data out, Worst case –25 – ns – |
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