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CY8C4128FNI-BL473 Fiches technique(PDF) 29 Page - Cypress Semiconductor

No de pièce CY8C4128FNI-BL473
Description  Programmable System-on-Chip
Download  47 Pages
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Fabricant  CYPRESS [Cypress Semiconductor]
Site Internet  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C4128FNI-BL473 Fiches technique(HTML) 29 Page - Cypress Semiconductor

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PRELIMINARY
PSoC® 4: PSoC 4XX8_BLE
Family Datasheet
Document Number: 001-94624 Rev. *K
Page 29 of 47
SPI Specifications
Memory
Table 32. Fixed UART AC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID236
FUART
Bit rate
1
Mbps
Table 33. Fixed SPI DC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID237
ISPI1
Block current consumption at 1 Mbps
360
µA
SID238
ISPI2
Block current consumption at 4 Mbps
560
µA
SID239
ISPI3
Block current consumption at 8 Mbps
600
µA
Table 34. Fixed SPI AC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID240
FSPI
SPI operating frequency (master; 6X
oversampling)
––
8
MHz
Table 35. Fixed SPI Master Mode AC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID241
TDMO
MOSI valid after Sclock driving edge
18
ns
SID242
TDSI
MISO valid before Sclock capturing edge.
Full clock, late MISO sampling used
20
ns
Full clock, late MISO
sampling
SID243
THMO
Previous MOSI data hold time
0
ns
Referred to Slave
capturing edge
Table 36. Fixed SPI Slave Mode AC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID244
TDMI
MOSI valid before Sclock capturing edge
40
ns
SID245
TDSO
MISO valid after Sclock driving edge
42 + 3
× TCPU
ns
SID246
TDSO_ext
MISO valid after Sclock driving edge in
external clock mode
53
ns
VDD < 3.0 V
SID247
THSO
Previous MISO data hold time
0
ns
SID248
TSSELSCK
SSEL valid to first SCK valid edge
100
ns
Table 37. Flash DC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID249
VPE
Erase and program voltage
1.71
5.5
V
SID309
TWS48
Number of Wait states at
32–48 MHz
2–
CPU execution from
flash
SID310
TWS32
Number of Wait states at
16–32 MHz
1–
CPU execution from
flash
SID311
TWS16
Number of Wait states for
0–16 MHz
0–
CPU execution from
flash


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