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CY8C4128FNI-BL473 Fiches technique(PDF) 24 Page - Cypress Semiconductor |
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CY8C4128FNI-BL473 Fiches technique(HTML) 24 Page - Cypress Semiconductor |
24 / 47 page PRELIMINARY PSoC® 4: PSoC 4XX8_BLE Family Datasheet Document Number: 001-94624 Rev. *K Page 24 of 47 SID125 Slew_rate Cload = 50 pF, Power = High, VDDA 2.7 V 6– – V/µs – SID126 T_op_wake From disable to enable, no external RC dominating –300 – µs – Comp_mode (Comparator Mode; 50-mV Drive, TRISE = TFALL (Approx.) SID127 TPD1 Response time; power = high – 150 – ns – SID128 TPD2 Response time; power = medium – 400 – ns – SID129 TPD3 Response time; power = low – 2000 – ns – SID130 Vhyst_op Hysteresis – 10 – mV – Deep Sleep (Deep Sleep mode operation is only guaranteed for VDDA > 2.5 V) SID131 GBW_DS Gain bandwidth product – 50 – kHz – SID132 IDD_DS Current – 15 – µA – SID133 Vos_DS Offset voltage – 5 – mV – SID134 Vos_dr_DS Offset voltage drift – 20 – µV/°C – SID135 Vout_DS Output voltage 0.2 – VDD–0.2 V – SID136 Vcm_DS Common mode voltage 0.2 – VDD–1.8 V – Table 14. Opamp Specifications (continued) Spec ID# Parameter Description Min Typ Max Units Details/ Conditions Note 3. ULP LCOMP operating conditions: - VDDD 2.6 V-5.5 V for datasheet temp range < 0 °C - VDDD 1.8 V-5.5 V for datasheet temp range ≥ 0 °C Table 15. Comparator DC Specifications[3] Spec ID# Parameter Description Min Typ Max Units Details/Conditions SID140 VOFFSET1 Input offset voltage, Factory trim – – ±10 mV – SID141 VOFFSET2 Input offset voltage, Custom trim – – ±6 mV – SID141A VOFFSET3 Input offset voltage, ultra-low-power mode –±12 – mV VDDD ≥ 2.6 V for Temp < 0 °C VDDD ≥ 1.8 V for Temp ≥ 0°C SID142 VHYST Hysteresis when enabled. Common Mode voltage range from 0 to VDD –1 – 10 35 mV – SID143 VICM1 Input common mode voltage in normal mode 0– VDDD –0.1 V Modes 1 and 2 SID144 VICM2 Input common mode voltage in low power mode 0– VDDD V– SID145 VICM3 Input common mode voltage in ultra low power mode 0– VDDD –1.15 V VDDD ≥ 2.6 V for Temp < 0 °C VDDD ≥ 1.8 V for Temp ≥ 0°C SID146 CMRR Common mode rejection ratio 50 – – dB VDDD ≥ 2.7 V SID147 CMRR Common mode rejection ratio 42 – – dB VDDD ≤ 2.7 V SID148 ICMP1 Block current, normal mode – – 400 µA – SID149 ICMP2 Block current, low power mode – – 100 µA – SID150 ICMP3 Block current in ultra low-power mode – 6 – µA VDDD ≥ 2.6 V for Temp < 0 °C VDDD ≥ 1.8 V for Temp ≥ 0°C SID151 ZCMP DC input impedance of comparator 35 – – MΩ – |
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