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BCM20730A1KFBG Fiches technique(PDF) 23 Page - Cypress Semiconductor |
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BCM20730A1KFBG Fiches technique(HTML) 23 Page - Cypress Semiconductor |
23 / 62 page Microprocessor Unit BROADCOM September 9, 2013 • 20730-DS108-R Page 22 ® BCM20730 Data Sheet BROADCOM CONFIDENTIAL Internal Reset Figure 4: Internal Reset Timing External Reset The BCM20730 has an integrated power-on reset circuit that completely resets all circuits to a known power- on state. An external active low reset signal, RESET_N, can be used to put the BCM20730 in the reset state. The RESET_N pin has an internal pull-up resistor and, in most applications, it does not require that anything be connected to it. RESET_N should only be released after the VDDO supply voltage level has been stabilized. Figure 5: External Reset Timing VDDO VDDO POR VDDC VDDO POR threshold VDDO POR delay ~ 2 ms VDDC POR VDDC POR threshold VDDC POR delay ~ 2 ms Baseband Reset Crystal warm-up delay: ~ 5 ms Crystal Enable Start reading EEPROM and firmware boot RESET_N Pulse width >50 µs Crystal Enable Baseband Reset Start reading EEPROM and firmware boot Crystal warm-up delay: ~ 5 ms |
Numéro de pièce similaire - BCM20730A1KFBG |
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