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OPA2613 Fiches technique(PDF) 23 Page - Texas Instruments

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No de pièce OPA2613
Description  Dual, Wideband, High Output Current, Operational Amplifier with Current Limit
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

OPA2613 Fiches technique(HTML) 23 Page - Texas Instruments

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OPA2613
SBOS249D − JUNE 2003− REVISED APRIL 2004
www.ti.com
23
DIFFERENTIAL NOISE PERFORMANCE
As the OPA2613 is used as a differential driver in xDSL
applications, it is important to analyze the noise in such a
configuration. Figure 14 shows the op amp noise model for
the differential configuration.
R
G
R
F
RS
E
O
2
Driver
E
RS
E
N
I
N
IN
√4kTR
S
√4kTR
F
√4kTR
F
RF
R
S
E
RS
E
N
I
N
I
N
√4kTR
S
√4kTR
G
Figure 14. Differential Op Amp Noise Analysis
Model
As a reminder, the differential gain is expressed as:
G
D
+ 1 )
2
R
F
R
G
The output noise can be expressed as shown below:
e
O +
2
G
D
2
e
N
2 ) i
N
R
S
2
) 4kTR
S
) 2 i
I
R
F
2
) 2 4kTR
F
G
D
Dividing this expression by the differential noise gain
(GD = (1 + 2RF/RG)) gives the equivalent input referred
spot noise voltage at the noninverting input, as shown in
Equation 21.
e
i +
2
e
N
2 ) i
N
R
S
2
) 4kTR
S
) 2
i
IRF
G
D
2
) 2
4kTR
F
G
D
Evaluating these equations for the OPA2613 ADSL circuit
and component values of Figure 6 gives a total output spot
noise voltage of 23.3nV/
√Hz and a total equivalent input
spot noise voltage of 3.2nV/
√Hz.
In order to minimize the output noise due to the
noninverting input bias current noise, it is recommended to
keep the noninverting source impedance as low as
possible.
DC ACCURACY AND OFFSET CONTROL
The OPA2613 can provide excellent DC signal accuracy
due to its high open-loop gain, high common-mode
rejection, high power-supply rejection, and low input offset
voltage and bias current offset errors. To take full
advantage of the low input offset voltage (
±1.0mV
maximum at 25
°C), careful attention to input bias current
cancellation is also required. The high-speed input stage
for the OPA2613 has relatively high input bias current (6
µA
typical into the pins) but with a very close match between
the two input currents, typically 50nA input offset current.
The total output offset
voltage
may
be
reduced
considerably by matching the source impedances looking
out of the two inputs. For example, one way to add bias
current cancellation to the circuit of Figure 1 would be to
insert a 175
Ω series resistor into the noninverting input
from the 50
Ω terminating resistor. If the 50Ω source
resistor is DC-coupled, this will increase the source
impedance for the noninverting input bias current to 200
Ω.
Since this is now equal to the impedance looking out of the
inverting input (RF || RG), the circuit will cancel the bias
current effects, leaving only the offset current times the
feedback resistor as a residual DC error term at the output.
Evaluating the configuration of Figure 1 adding a 175
Ω in
series with the noninverting input pin, using worst-case
+25
°C input offset voltage and the two input bias currents,
gives a worst-case output offset range equal to:
VOFF = ± (NG × VOS(MAX)) ± (IOS × RF)
where NG = noninverting signal gain
=
± (2 × 1.0mV) ± (402Ω × 300nA)
=
±2.0mV ± 0.12mV
VOFF = ±2.12mV
THERMAL ANALYSIS
Due to the high output power capability of the OPA2613,
heat-sinking or forced airflow may be required under
extreme operating conditions. Maximum desired junction
temperature sets the maximum allowed internal power
dissipation as described below. In no case should the
maximum junction temperature be allowed to exceed
150
°C. Operating junction temperature (TJ) is given by TA
+ PD × qJA. The total internal power dissipation (PD) is the
sum of quiescent power (PDQ) and additional power
dissipation in the output stage (PDL) to deliver load power.
Quiescent power is the specified no-load supply current
times the total supply voltage across the part. PDL
(19)
(20)
(21)


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