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TPS799L54YZYR Fiches technique(PDF) 3 Page - Texas Instruments |
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TPS799L54YZYR Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 22 page C3 C1 B2 A3 A1 OUT EN IN GND NR TPS799L54, TPS799L57 www.ti.com SBVS191B – APRIL 2012 – REVISED AUGUST 2014 5 Pin Configuration and Functions YZY Package DSBGA-5 (Top View) Pin Functions PIN NAME NO. I/O DESCRIPTION Driving this pin high turns on the regulator. Driving this pin low puts the regulator into EN A1 I shutdown mode. EN can be connected to IN if not used. GND B2 — Ground IN C3 I Input supply Noise reduction; connecting this pin to an external capacitor bypasses noise generated by NR A3 — the internal band gap. This capacitor allows output noise to be reduced to very low levels. Output of the regulator. To assure stability, a small ceramic capacitor (total typical OUT C1 O capacitance ≥ 2.0 μF) is required from this pin to ground. Copyright © 2012–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS799L54 TPS799L57 |
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