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TPS73719-Q1 Fiches technique(PDF) 3 Page - Texas Instruments |
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TPS73719-Q1 Fiches technique(HTML) 3 Page - Texas Instruments |
3 / 26 page Not to scale Pad 1 OUT 8 IN 2 NC 7 NC 3 FB,NR 6 NC 4 GND 5 EN 3 TPS73719-Q1, TPS73733-Q1 www.ti.com SBVS123A – DECEMBER 2008 – REVISED JULY 2016 Product Folder Links: TPS73719-Q1 TPS73733-Q1 Submit Documentation Feedback Copyright © 2008–2016, Texas Instruments Incorporated 5 Pin Configuration and Functions DRB Package 8-Pin VSON Top View Pin Functions PIN I/O DESCRIPTION NAME NO. EN 5 I Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. See Enable Pin and Shutdown for more details. EN must not be left floating and can be connected to IN if not used. FB 3 I Adjustable voltage version only. This is the input to the control loop error amplifier, and it is used to set the output voltage of the device. GND 4, Pad G Ground IN 8 I Unregulated input supply NR 3 — Fixed voltage versions only. Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap, reducing output noise to very low levels. OUT 1 O Regulator output. A 1-µF or larger capacitor of any type is required for stability. NC 2, 6, 7 — No internal connection |
Numéro de pièce similaire - TPS73719-Q1_16 |
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Description similaire - TPS73719-Q1_16 |
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