www.ti.com

OFF

ON

OFF

SW

T

LOGIC

V

V

I

I

0 V

0 V

0 A

0 A

Time 1

Time 2

Time 3

Time 4

Time 5

SW

T

CHG

XFULL

OFF

ON

OF

F

OFF ON

OFF

0 V

0 V

0 A

0 A

V

V

I

I

Control Charging

t

= L

ON

I

PEAK

V

BAT

÷

÷

ø

ö

ç

ç

è

æ

(1)

TPS65552A

SLVS567 – JULY 2005

Figure 5. Timing Diagram at One Switching Cycle

Figure 6. Timing Diagram at Beginning/Ending

The TPS65552A provides three comparators to control charging. Figure 2 shows the block diagram of

TPS65552A and Figure 5 shows one timing diagram switching cycle. Note that emphasis is placed on Time1 and

Time3 of the waveform in Figure 5.

While SW is ON (Time1 to Time2 in Figure 5), U3 monitors current flow through integrated power-MOSFET from

When SW turns OFF (Time2 in Figure 5), the magnetic energy in the transformer starts discharging. Meanwhile,

U2 monitors the kickback voltage at the SW terminal. As the energy is discharging, the kickback voltage is

Figure 5). After rectification stops, the small amount of energy left in the transformer is released via the parasitic

path, and the kickback voltage reaches zero (Time3 to Time4 in Figure 5). During this period, U2 makes SW turn

and Time5 in Figure 5 is small or does not appear dependent on the delay time of the U2 detection to SW ON.

Figure 6).

In Figure 5 and Figure 6, ON time is always the same period in every switching. The ON time is calculated by

However, OFF time is dependant on output voltage. As the output voltage gets higher, the OFF time gets shorter

7

Not Recommended for New designs