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M38B79MFH Fiches technique(PDF) 11 Page - Mitsubishi Electric Semiconductor |
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M38B79MFH Fiches technique(HTML) 11 Page - Mitsubishi Electric Semiconductor |
11 / 109 page 38B7 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change. 11 [CPU Mode Register (CPUM)] 003B16 The CPU mode register contains the stack page selection bit and the internal system clock selection bit etc. The CPU mode register is allocated at address 003B16. Fig. 7 Structure of CPU mode register CPU mode register (CPUM: address 003B16) b7 b0 Processor mode bits b1b0 0 0 : Single-chip mode 0 1 : 1 0 : Not available 1 1 : Port XC switch bit 0 : I/O port function 1 : XCIN–XCOUT oscillating function Main clock (XIN–XOUT) stop bit 0 : Oscillating 1 : Stopped Main clock division ratio selection bit 0 : f(XIN) (high-speed mode) 1 : f(XIN)/4 (middle-speed mode) Internal system clock selection bit 0 : XIN-XOUT selection (middle-/high-speed mode) 1 : XCIN-XCOUT selection (low-speed mode) Stack page selection bit 0 : Page 0 1 : Page 1 Not used (return “1” when read) (Do not write “0” to this bit.) |
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