M38B79MFH datasheet(66/109 Pages) MITSUBISHI

No de pièce	M38B79MFH

Description	SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER????

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Fabricant	MITSUBISHI [Mitsubishi Electric Semiconductor]

Site Internet	http://www.mitsubishichips.com

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66 / 109 page

38B7 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS

PRELIMINAR

Y

Notice:

This

is not

a final

specification.

Some

parametric

limits

are

subject

to

change.

66

Interrupt interval determination control register

(IIDCON: address 003116)

Interrupt interval determination circuit operating selection bit

0 : Stopped

1 : Operating

Counter sampling clock selection bit

0 : f(XIN)/128 or f(XCIN)

1 : f(XIN)/256 or f(XCIN)/2

Noise filter sampling clock selection bits (INT2)

b3b2

0 0 : Filter stop

0 1 : f(XIN)/32 or f(XCIN)

1 0 : f(XIN)/64 or f(XCIN)/2

1 1 : f(XIN)/128 or f(XCIN)/4

One-sided/both-sided edge detection selection bit

0 : One-sided edge detection

1 : Both-sided edge detection (can be used when using a noise filter)

Not used (return “0” when read)

(Do not write “1” to these bits.)

b7

b0

Remote control

interrupt request

0

1

2

3

4

5

6

1

2

3

0

FE

FF

N

FF

0

FF

6

N

1

N

(When IIDCON4 = “0”)

Noise filter

sampling clock

INT2 pin

Acceptance of

interrupt

Counter sampling

clock

8-bit binary up

counter value

Interrupt interval

determination

register value

Remote control

interrupt request

Counter overflow

interrupt request

0

1

0

FE

FF

2

FF

2

3

FF

2

N

3

2

0

1

2

1

0

1

0

2

Remote control

interrupt request

(When IIDCON4 = “1”)

Noise filter

sampling clock

INT2 pin

Acceptance of

interrupt

Counter sampling

clock

8-bit binary up

counter value

Interrupt interval

determination

register value

Remote control

interrupt request

Counter overflow

interrupt request

Remote control

interrupt request

Remote control

interrupt request

Fig. 71 Interrupt interval determination operation example (at both-sided edge active)

Fig. 70 Interrupt interval determination operation example (at rising edge active)

Fig. 69 Structure of interrupt interval determination control register

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