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TS13102 Fiches technique(PDF) 6 Page - Semtech Corporation

No de pièce TS13102
Description  Solid State Relay
Download  16 Pages
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Fabricant  SEMTECH [Semtech Corporation]
Site Internet  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

TS13102 Fiches technique(HTML) 6 Page - Semtech Corporation

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TS13102
Final Datasheet Rev 2.3
28 July 2016
6 of 16
Semtech
Proprietary & Confidential
Detailed Description
Communication Protocol
The TS13102 device supports a proprietary single-wire interface that is compact and allows support of systems where galvanic
isolation is required with a minimum number of external components. If the status sent on the DATA is not required for your
application, this pin can remain floating.
Bit Signaling
The MCU can generate three signals on the CLK pin: Reset, Zero, and One. The Zero and One signals are digital bits and form a
command word. Each command word is preceded by a Reset signal.
Reset Signal (R)
The Reset signal is a zero logic level that is kept low for longer than TRESET.
Zero Signal (0)
The Zero signal is two pulses of period TCLK during a bit period TBIT.
One Signal (1)
The One signal is four pulses of period TCLK during a bit period TBIT.
Figure 2: Communication Protocol
CLK:
ANY
R
1
1
0
A2
A1
A0
C3
C2
C1
C0
1
1
1
1
1
ANY
Switch State:
Old State
New State
DATA:
High Impedance
0
S2
S1
S0
0
High
Impedance
Table 1: Communication Sequence
Device Addressing
Figure 2 shows the beginning of a command sequence. This pattern appears at the CLK input and forms the Preamble, as shown
in Table 1, a sequence of a low period for duration of TRESET or greater, followed by a bit sequence of (1 1 0). The following three
bits designate the address of the device being selected. These three bits (A2 A1 A0) correspond to the device with AD2, AD1,
and AD0 pins connected as in the Address Configuration Table shown in Figure 5. See the Multi-channel Application section for
more information.
T
RESET
TBIT
TBIT
TBIT
TCLK
Reset (R)
One (1)
One (1)
Zero (0)
Preamble
Address
Command
Status


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