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TPS610987DSER Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS610987DSER Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 44 page 5 TPS61098, TPS610981 TPS610982, TPS610985, TPS610986, TPS610987 www.ti.com SLVS873D – JUNE 2015 – REVISED APRIL 2016 Product Folder Links: TPS61098 TPS610981 TPS610982 TPS610985 TPS610986 TPS610987 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Input voltage VIN, SW, VMAIN, VSUB -0.3 4.7 V MODE -0.3 5.0 V Operating junction temperature, TJ –40 150 °C Storage temperature range, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500V HBM rating allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250V CDM rating allows safe manufacturing with a standard ESD control process. 7.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±1000 V Charged Device Model (CDM), per JEDEC specification JESD22- C101, all pins(2) ±250 (1) Effective value. Ceramic capacitor’s derating effect under bias should be considered. Choose the right nominal capacitance by checking capacitor DC bias characteristics. (2) If LDO output current is lower than 20 mA, the minimum effective output capacitance value can be lower to 0.5 µF. (3) With load switch version, the output capacitor at VSUB pin is only required if smaller voltage ripple is needed. 7.3 Recommended Operating Conditions MIN NOM MAX UNIT VIN Input voltage range 0.7 4.5 V V(MAIN) Boost converter output voltage range 2.2 4.3 V V(SUB) Load switch / LDO outut voltage range 1.8 3.7 V L Effective inductance range 1.54 4.7 6.11 µH CBAT Effective input capacitance range at input(1) 5 µF CO1 Effective output capacitance range at VMAIN pin for boost converter output (1) 5 10 22 µF CO2 Effective output capacitance range at VSUB pin for LDO output (1) 1(2) 5 10 µF Effective output capacitance range at VSUB pin for load switch output (1)(3) 1 2.2 µF TJ Operating virtual junction temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 7.4 Thermal Information THERMAL METRIC(1) TPS61098x UNIT DSE 6 PINS RθJA Junction-to-ambient thermal resistance 207.3 °C/W RθJCtop Junction-to-case (top) thermal resistance 118.9 RθJB Junction-to-board thermal resistance 136.4 ψJT Junction-to-top characterization parameter 8.3 ψJB Junction-to-board characterization parameter 136.4 RθJCbot Junction-to-case (bottom) thermal resistance N/A |
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