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TPS60200, TPS60201, TPS60202, TPS60203

SLVS274A – MARCH 2000 – REVISED APRIL 2016

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Product Folder Links: TPS60200 TPS60201 TPS60202 TPS60203

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Copyright © 2000–2016, Texas Instruments Incorporated

Feature Description (continued)

8.3.3 Power-Good Detector

The power-good output is an open-drain output that pulls low when the output is out of regulation. When the

output rises to within 90% of its nominal voltage, the power-good output is released. Power-good is high

impedance in shutdown. In normal operation, an external pullup resistor must be connected between PG and

OUT, or any other voltage rail in the appropriate range. The resistor should be in the 100-k

Ω to 1-MΩ range. If

the PG output is not used, it should remain unconnected.

8.4 Device Functional Modes

8.4.1 Push-Pull Operating Mode

The two single-ended charge pump power stages operate in the so-called push-pull operating mode, that is they

operate with a 180°C phase shift. Each single-ended charge pump transfers charge into its transfer capacitor (C1

or C2) in one half of the period. During the other half of the period (transfer phase), the transfer capacitor is

phase, the other one is in the transfer phase. This operation assures an almost constant output current which

ensures a low output ripple.

If the clock were to run continuously, this process would eventually generate an output voltage equal to two times

the input voltage (hence the name voltage doubler). To provide a regulated fixed output voltage of 3.3 V, the

TPS6020x devices use either pulse-skip or constant-frequency linear-regulation control mode. The mode is

automatically selected based on the output current. If the load current is below the LinSkip current threshold, it

switches into the power-saving pulse-skip mode to boost efficiency at low output power.

8.4.2 Constant-Frequency Mode

When the output current is higher then the LinSkip current threshold, the charge pump runs continuously at the

gate drive increases, resulting in a larger voltage across C1 and C2. This regulation scheme minimizes output

ripple. Since the device switches continuously, the output signal contains well-defined frequency components,

and the circuit requires smaller external capacitors for a given output ripple. However, constant-frequency mode,

due to higher operating current, is less efficient at light loads. For this reason, the device switches seamlessly

into the pulse-skip mode when the output current drops below the LinSkip current threshold.

8.4.3 Pulse-Skip Mode

The regulator enters the pulse-skip mode when the output current is lower than the LinSkip current threshold of

7 mA. In the pulse-skip mode, the error amplifier disables switching of the power stages when it detects an

output voltage higher than 3.3 V. The controller skips switching cycles until the output voltage drops below 3.3 V.

Then the error amplifier reactivates the oscillator and switching of the power stages starts again. A 30-mV output

voltage offset is introduced in this mode.

The pulse-skip regulation mode minimizes operating current because it does not switch continuously and

deactivates all functions except the voltage reference and error amplifier when the output is higher than 3.3 V.

is transferred by the charge pump from the input to the output is limited to the minimum that is necessary to

sustain a regulated output voltage, with the benefit that the output ripple is kept to a minimum. When switching is

disabled from the error amplifier, the load is also isolated from the input.