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TPS62180 Fiches technique(PDF) 5 Page - Texas Instruments |
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TPS62180 Fiches technique(HTML) 5 Page - Texas Instruments |
5 / 35 page TPS62180, TPS62182 www.ti.com SLVSBB8A – AUGUST 2014 – REVISED AUGUST 2014 8.5 Electrical Characteristics Over operating junction temperature range (TJ = –40°C to +125°C) and VIN = 4 V to 15 V. Typical values at VIN = 12 V and TJ = 25°C (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VIN Input voltage range 4 15 V EN = High, IOUT = 0 mA, Device not switching, IQ Operating quiescent current 28 55 µA (TJ = –40°C to +85°C) ISD Shutdown current EN = Low ( ≤ 0.3 V), (TJ = –40°C to +85°C) 2.8 15 µA VUVLO Falling input voltage 3.5 3.6 3.7 V Undervoltage lockout threshold (1) Hysteresis 300 mV TSD Rising junction temperature 160 Thermal shutdown °C Hysteresis 20 CONTROL (EN, SS/TR, PG) VH_EN High-level input threshold voltage (EN) 0.97 1 1.03 V VL_EN Low-level input threshold voltage (EN) 0.87 0.9 0.93 V ILKG_EN Input leakage current (EN) EN = VIN or GND 0.01 1.2 µA ISS/TR SS/TR pin source current 4.5 5 5.5 µA Rising (%VOUT) 94% 96% 98% VTH_PG Power good threshold voltage Falling (%VOUT) 90% 92% 94% VOL_PG Power good output low voltage IPG= -2 mA 0.3 V ILKG_PG Input leakage current (PG) 1 100 nA POWER SWITCH Phase 1 High-side MOSFET ON-resistance 27 65 m Ω Phase 2 RDS(ON) VIN = 7.5 V Phase 1 Low-side MOSFET ON-resistance 21 45 m Ω Phase 2 ILIM High-side MOSFET current limit Each phase, VIN = 7.5 V 4.0 4.7 5.5 A TPSD Phase shift delay time Phase 2 after Phase 1, PWM mode 250 ns OUTPUT VREF Internal reference voltage 0.792 0.8 0.808 V ILKG_FB Input leakage current (FB) VFB = 0.8 V 1 100 nA RDISCHARGE Output discharge resistance EN = Low 60 Ω Output voltage range (TPS62180) VIN ≥ VOUT 0.9 6 V Output voltage (TPS62182) 3.3 V PWM Mode, VIN ≥ VOUT + 1 V –1% 1% Power Save Mode, VOUT = 3.3 V, Iload ≥ 1 mA, L = 1 µH, COUT = 2 x 47 µF, (TJ = –40°C to +85°C) Feedback voltage accuracy –1% 2% Power Save Mode, VOUT = 1.8 V, Iload ≥ 1 mA, (TPS62180)(2) L = 1 µH, COUT = 4 x 47 µF, (TJ = –40°C to +85°C) VOUT Power Save Mode, VOUT = 0.9 V, Iload ≥ 1 mA, –1% 3% L = 1 µH, COUT = 4 x 47 µF, (TJ = –40°C to +85°C) PWM Mode, VIN ≥ VOUT + 1 V –1% 1% Output voltage accuracy Power Save Mode, Iload ≥ 1 mA, L = 1 µH, (TPS62182)(2) –1% 2% COUT = 2 x 47 µF, (TJ = –40°C to +85°C) Load regulation VOUT = 3.3 V, PWM Mode operation 0.04 %/A Line regulation 4 V ≤ VIN ≤ 15 V, VOUT = 3.3 V, IOUT = 4 A 0.01 %/V Hiccup on time 0.9 tHICCUP ms Hiccup off time 5 (1) The minimum VIN value of 4 V is not violated by UVLO threshold and hysteresis variations. (2) The accuracy in Power Save Mode can be improved by increasing the output capacitor value, reducing the output voltage ripple. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPS62180 TPS62182 |
Numéro de pièce similaire - TPS62180_16 |
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Description similaire - TPS62180_16 |
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